Strong Injection Locking in Low- Q LC Oscillators: Modeling and Application in a Forwarded-Clock I/O Receiver von Shekhar, S., Balamurugan, G., Allstot, D.J., Mansuri, M., Jaussi, J.E., Mooney, R., Kennedy, J., Casper, B., O'Mahony, F.

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8-Gb/s source-synchronous I/O link with adaptive receiver equalization, offset cancellation, and clock de-skew von Jaussi, J.E., Balamurugan, G., Johnson, D.R., Casper, B., Martin, A., Kennedy, J., Shanbhag, N., Mooney, R.

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An 8-Gb/s simultaneous bidirectional link with on-die waveform capture von Casper, B., Martin, A., Jaussi, J.E., Kennedy, J., Mooney, R.

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A Scalable 5-15 Gbps, 14-75 mW Low-Power I/O Transceiver in 65 nm CMOS von Balamurugan, Ganesh, Kennedy, Joseph, Banerjee, Gaurab, Jaussi, James E., Mansuri, Mozhgan, O'Mahony, Frank, Casper, Bryan, Mooney, Randy

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A 3.6-Gb/s point-to-point heterogeneous-voltage-capable DRAM interface for capacity-scalable memory subsystems von Kennedy, J., Mooney, R., Ellis, R., Jaussi, J., Borkar, S., Jung-Hwan Choi, Jae-Kwan Kim, Chan-Kyong Kim, Woo-Seop Kim, Chang-Hyun Kim, Soo-In Cho, Loeffler, S., Hoffmann, J., Hokenmaier, W., Houghton, R., Vogelsang, T.

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A scalable 0.128-to-1Tb/s 0.8-to-2.6pJ/b 64-lane parallel I/O in 32nm CMOS von Mansuri, M., Jaussi, J. E., Kennedy, J. T., Hsueh, T., Shekhar, S., Balamurugan, G., O'Mahony, F., Roberts, C., Mooney, R., Casper, B.

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Modeling and Analysis of High-Speed I/O Links von Balamurugan, G., Casper, B., Jaussi, J.E., Mansuri, M., O'Mahony, F., Kennedy, J.

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8Gb/s differential simultaneous bidirectional link with 4mV 9ps waveform capture diagnostic capability von Martin, A., Casper, B., Kennedy, J., Jaussi, J., Mooney, R.

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A high-frequency CMOS current summing circuit von Comer, D J, Comer, D T, Martin, A K, Jaussi, J E

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A 2Gb/s point-to-point heterogeneous voltage capable DRAM interface for capacity-scalable memory subsystems von Kennedy, J., Ellis, R., Jaussi, J., Mooney, R., Borkar, S., Jung-Hwan Choi, Jae-Kwan Kim, Chan-Kyong Kim, Woo-Seop Kim, Chang-Hyun Kim, Soo-In Cho, Loeffler, S., Hoffmann, J., Hokenmaier, W., Houghton, R., Vogelsang, T.

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High-Speed Flex-Circuit Chip-to-Chip Interconnects von Braunisch, H., Jaussi, J.E., Mix, J.A., Trobough, M.B., Horine, B.D., Prokofiev, V., Daoqiang Lu, Baskaran, R., Meier, P.C.H., Dong-Ho Han, Mallory, K.E., Leddige, M.W.

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Strong injection locking of low-Q LC oscillators von Mansuri, M., O'Mahony, F., Balamurugan, G., Jaussi, J., Kennedy, J., Shekhar, S., Mooney, R., Casper, B.

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A Scalable 5a15 Gbps, 14a75 mW Low-Power I/O Transceiver in 65 nm CMOS von Balamurugan, G, Kennedy, J, Banerjee, G, Jaussi, JE, Mansuri, M, O'Mahony, F, Casper, B, Mooney, R

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A 20Gb/s Embedded Clock Transceiver in 90nm CMOS von Mooney, R., Kennedy, J., Canagasaby, K., Mansuri, M., O'Mahony, F., Jaussi, J., Casper, B.

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A 20Gb/s Forwarded Clock Transceiver in 90nm CMOS B von Casper, B., Jaussi, J., O'Mahony, F., Mansuri, M., Canagasaby, K., Kennedy, J., Yeung, E., Mooney, R.

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Multi-Gbit I/O and interconnect co-design for power efficient links von Jaussi, J E, Leddige, M, Horine, B, O'Mahony, F, Casper, B

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Evaluation and proposed modifications of multidisciplinary laboratories von Jaussi, J R, Baum, J H, Swaner, J C, Burford, H J

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An 8Gb/s source-synchronous I/O link with adaptive receiver equalization, offset cancellation and clock deskew von Jaussi, J.E., Balamurugan, G., Johnson, D.R., Casper, B.K., Martin, A., Kennedy, J.T., Shanbhag, N., Mooney, R.

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Evaluation and proposed modifications of multidisciplinary laboratories von Jaussi, J R, Baum, J H, Swaner, J C, Burford, H J

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Co-Packaged Photonics For High Performance Computing: Status, Challenges And Opportunities von Mahajan, Ravi, Li, Xiaoqian, Fryman, Joshua, Zhang, Zhichao, Nekkanty, Srikant, Tadayon, Pooya, Jaussi, James, Shumarayev, Sergey, Agrawal, Ankur, Jadhav, Susheel, Singh, Kumar Abhishek, Alduino, Andrew, Gujjula, Sushrutha, Chiu, Chia-Pin, Nordstog, Thomas, Hosseini, Kaveh J., Sane, Sandeep, Deshpande, Nitin, Aygun, Kemal, Sarkar, Arnab, Dobriyal, Priyanka, Pothukuchi, Suresh, Pogue, Vanessa, Hui, David

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