RIE dynamics for extreme wafer thinning applications von Rassoul, Nouredine, Jourdain, Anne, Tutunjyan, Nina, De Vos, Joeri, Sardo, Stefano, Inoue, Fumihiro, Piumi, Daniele, Beyer, Gerald, Miller, Andy, Beyne, Eric, Walsby, Edward, Patel, Jash, Ansel, Oliver, Ashraf, Huma, Hopkins, Janet, Thomas, Dave

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The Increasing Role of Polymers in Advanced Packaging - From Stress Buffer Layers to Wafer Level Underfills and Beyond von Miller, Andy, Rebibis, Kenneth J., Duval, Fabrice D. D., Wang, Teng, Slabbekoorn, John, Vos, Joeri De, Beyne, Eric

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Influence of Si wafer thinning processes on (sub)surface defects von Inoue, Fumihiro, Jourdain, Anne, Peng, Lan, Phommahaxay, Alain, De Vos, Joeri, Rebibis, Kenneth June, Miller, Andy, Sleeckx, Erik, Beyne, Eric, Uedono, Akira

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Effect of test structure on electromigration characteristics in three-dimensional through silicon via stacked devices von Oba, Yoshiyuki, De Messemaeker, Joke, Tyrovouzi, Anna Maria, Miyamori, Yuichi, De Vos, Joeri, Wang, Teng, Beyer, Gerald, Beyne, Eric, De Wolf, Ingrid, Croes, Kristof

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Wafer-to-wafer hybrid bonding at 400-nm interconnect pitch von Chew, Soon Aik, De Vos, Joeri, Beyne, Eric

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4‐3: MircoLED display on 300mm CMOS platform – crosstalk and optical outcoupling von Steudel, Soeren, Vertommen, Johan, Le Boulbar, Emmanuel, Buscemi, Giuseppe, Bach, Lars, Van Huylenbroeck, Stefaan, Kang, Shuo, De Vos, Joeri, Miller, Andy, Osman, Haris, Rebibis, Kenneth June

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Anomalous – Inversion in TSVs: The Problem and Its Cure von Stucchi, Michele, De Vos, Joeri, Jourdain, Anne, Li, Yunlong, Van Der Plas, Geert, Croes, Kristof, Beyne, Eric

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Experimental Characterization of the Vertical and Lateral Heat Transfer in Three-Dimensional Stacked Die Packages von Oprins, Herman, Cherman, Vladimir, Van der Plas, Geert, De Vos, Joeri, Beyne, Eric

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Optical Beam-Based Defect Localization Methodologies for Open and Short Failures in Micrometer-Scale 3-D TSV Interconnects von Jacobs, Kristof J.P, Li, Yunlong, Stucchi, Michele, De Wolf, Ingrid, Van Huylenbroeck, Stefaan, De Vos, Joeri, Beyne, Eric

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Etch process modules development and integration in 3D-SOC applications von Tutunjyan, Nina, Sardo, Stefano, De Vos, Joeri, Van Huylenbroeck, Stefaan, Jourdain, Anne, Peng, Lan, Inoue, Fumihiro, Rassoul, Nouredine, Beyer, Gerald, Beyne, Eric, Miller, Andy, Piumi, Daniele

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Optical Beam-Based Defect Localization Methodologies for Open and Short Failures in Micrometer-Scale 3-D TSV Interconnects von Jacobs, Kristof J. P., Li, Yunlong, Stucchi, Michele, De Wolf, Ingrid, Van Huylenbroeck, Stefaan, De Vos, Joeri, Beyne, Eric

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57‐3: MircoLED Display Integration on 300mm Advanced CMOS Platform von Steudel, Soeren, Vertommen, Johan, Le Boulbar, Emmanuel, Buscemi, Giuseppe, Bach, Lars, Van Huylenbroeck, Stefaan, Arumugam, Hariharan, La Tulipe, Douglas Charles, De Vos, Joeri, Miller, Andy, Osman, Haris, Rebibis, Kenneth June

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Impact of via density and passivation thickness on the mechanical integrity of advanced Back-End-Of-Line interconnects von Ključar, Luka, González, Mario, Croes, Kristof, De Wolf, Ingrid, De Messemaeker, Joke, Murdoch, Gayle, Nolmans, Philip, De Vos, Joeri, Bömmels, Jürgen, Beyne, Eric, Tőkei, Zsolt

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Advanced experimental back-end-of-line (BEOL) stability test: Measurements and simulations von Vanstreels, Kris, Cherman, Vladimir, Gonzalez, Mario, De Wolf, Ingrid, Van der Plas, Geert, De Vos, Joeri, Bömmels, Jürgen, Tőkei, Zsolt

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Advanced experimental back-end-of-line (BEOL) stability test: Measurements and simulations von Vanstreels, Kris, Cherman, Vladimir, Gonzalez, Mario, De Wolf, Ingrid, Van der Plas, Geert, De Vos, Joeri, Bömmels, Jürgen, Tökei, Zsolt

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High-k Materials for Tunnel Barrier Engineering in Floating-Gate Flash Memories von Blomme, Pieter, Govoreanu, Bogdan, Rosmeulen, Maarten, Akheyar, Amal, Haspeslagh, Luc, De Vos, Joeri, Lorenzini, Martino, Van Houdt, Jan, De Meyer, Kristin

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First Demonstration of Hybrid CMOS Imagers With Simultaneous Very Low Crosstalk and High-Broadband Quantum Efficiency von Minoglou, K., De Munck, K., De Vos, J., Tezcan, D. S., Van Hoof, C., De Moor, P.

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Effect of test structure on electromigration characteristics in three-dimensional through silicon via stacked devices von Oba, Yoshiyuki, De Messemaeker, Joke, Tyrovouzi, Anna Maria, Miyamori, Yuichi, De Vos, Joeri, Wang, Teng, Beyer, Gerald, Beyne, Eric, De Wolf, Ingrid, Croes, Kristof

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On the processing aspects of high performance hybrid backside illuminated CMOS imagers von De Vos, Joeri, De Munck, Koen, Minoglou, Kiki, Rao, Padmakumar Ramachandra, Erismis, Mehmet Akif, De Moor, Piet, Tezcan, Deniz Sabuncuoglu

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Substrate, assembly and method for wafer-to-wafer hybrid bonding von De Vos, Joeri, Beyne, Eric

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