Optimum halo structure for sub-0.1 μm CMOSFETs von Yeh, W-K, Chou, J-W

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An anomalous crossover in Vth roll-off for indium-doped nMOSFETs von Chang, Sun-Jay, Chang, Chun-Yen, Chen, Coming, Chou, Jih-Wen, Chao, Tien-Sheng, Huang, Tiao-Yuan

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The Effects of Super-Steep-Retrograde Indium Channel Profile on Deep Submicron n-Channel Metal-Oxide-Semiconductor Field-Effect Transistor von Chen, Coming, Chang, Sun-Jay, Chou, Jih-Wen, Lin, Tony, Yeh, Wen-Kuan, Chang, Chun-Yen, Luo, Wen-Zheng, Lee, Yao-Jen, Chao, Tien-Sheng, Huang, Tiao-Yuan

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Optimization of Short Channel Effect with Arsenic Halo Implant through Polysilicon Gate von Chen, Coming, Chang, Chun-Yen, Chou, Jih-Wen, Cheng, Yao-Chin

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Shallow-Trench Isolation With Raised-Field-Oxide Structure von Chen, Coming, Chang, Chun-Yen, Chou, Jih-Wen, Lur, Water, Sun, Shih-Wei

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Optimum Treatment for Improvement of Indium-Halo Structure for Sub-0.1 µm n-Type Metal-Oxide-Semiconductor Field-Effect Transistor von Yeh, Wen-Kuan, Chou, Jih-Wen

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New Large Angle Tilt Implanted Drain Structure: Surface Counter-Doped-Lightly Doped Drain for High Hot Carrier Reliability von Chou, Jih Wen, Chang, Chun Yun, Huang, Chimoon, Ho, Lien Tse, Ko, Joe, Hsue, Peter

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A new drain engineering structure-SCD-LDD (surface counter doped LDD) for improved hot carrier reliability von JIH WEN CHOU, CHUN YUN CHANG, LIEN TSE HO, JOE KO, HSUE, P

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A Novel Shallow Trench Isolation with Mini-Spacer Technology von Yeh, Wen-Kuan, Lin, Tony, Chou, ComingChen, Sun, Shin-Wei

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Anomalous reverse short-channel effect in p+ polysilicon gated P-channel MOSFET von CHUN-YEN CHANG, CHIH-YUNG LIN, JIH WEN CHOU, CHING-HSIANG HSU, C, HONG-TSZ PAN, KO, J

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Optimum halo structure for sub-0.1 /spl mu/m CMOSFETs von Wen-Kuan Yeh, Jih-Wen Chou

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Optimum halo structure for sub-0.1 [mu]m CMOSFETs von Yeh, Wen-Kuan, Chou, Jih-Wen

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Optimum halo structure for sub-0.1 mum CMOSFETs von Yeh, Wen-Kuan, Chou, Jih-Wen

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MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE von CHOU, JIH-WEN

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Manufacturing method of semiconductor device von CHOU, JIH-WEN

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GAN DEVICE WITH N2 PRE-TREATMENT AND METHOD OF PERFORMING N2 PRE-TREATMENT von Yeh, Po-Hsien, Chen, Hwi-Huang, Chen, Hsin-Hong, Huang, Yu-Jen, Chou, Jih-Wen

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Integrated circuit and method of manufacturing same von Tai, Chih-Chung, Pu, Shih-Chieh, Chou, Jih-Wen

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SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME von Chen, Hwi-Huang, Chen, Hsin-Hong, Huang, Yu-Jen, Chou, Jih-Wen, Chang, Chia-Hao

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Semiconductor device and manufacturing method thereof von FANG, YENNG, CHOU, JIH-WEN

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HIGH ELECTRON MOBILITY TRANSISTOR DEVICE AND MANUFACTURING METHOD THEREOF von Chen, Hwi-Huang, Chen, Hsin-Hong, Lu, Chih-Hung, Huang, Yu-Jen, Hwang, Robin Christine, Chou, Jih-Wen

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