Analysis and Design of CMOS Clocking Circuits For Low Phase Noise von Bae, Woorham, Jeong, Deog-Kyoon

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Analysis of frequency detection capability of Alexander phase detector von Park, Kwanseo, Jeong, Deog-Kyoon

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A 7.6 mW, 414 fs RMS-Jitter 10 GHz Phase-Locked Loop for a 40 Gb/s Serial Link Transmitter Based on a Two-Stage Ring Oscillator in 65 nm CMOS von Woorham Bae, Ju, Haram, Kwanseo Park, Sung-Yong Cho, Deog-Kyoon Jeong

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Synthesisable glitch-less phase rotator with conditionally cascading scheme von Kim, Hyojun, Lee, Kwangho, Jeong, Deog-Kyoon

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Ultra-low-voltage low-power dynamic comparator with forward body bias scheme for SAR ADC von Hwang, Young-Ha, Jeong, Deog-Kyoon

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An AC–DC LED Driver With a Two-Parallel Inverted Buck Topology for Reducing the Light Flicker in Lighting Applications to Low-Risk Levels von Kim, Hyun-Chang, Choi, Moon Chul, Kim, Sungwoo, Jeong, Deog-Kyoon

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A Reconfigurable 40-to-67 dB SNR, 50-to-6400 Hz Frame-Rate, Column-Parallel Readout IC for Capacitive Touch-Screen Panels von Park, Jun-Eun, Lim, Dong-Hyuk, Jeong, Deog-Kyoon

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Balancing scheme for phase current and flying-capacitor voltage in three-level DC–DC converter von Choi, Minho, Kye, Chan-Ho, Jeong, Deog-Kyoon

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A Fully Passive Noise-Shaping SAR ADC Utilizing Last-Bit Majority Voting and Cyclic Dynamic Element Matching Techniques von Hwang, Young-Ha, Song, Yoonho, Park, Jun-Eun, Jeong, Deog-Kyoon

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A Supply-Scalable-Serializing Transmitter With Controllable Output Swing and Equalization for Next-Generation Standards von Bae, Woorham, Ju, Haram, Park, Kwanseo, Han, Jaeduk, Jeong, Deog-Kyoon

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Review of CMOS Integrated Circuit Technologies for High-Speed Photo-Detection von Jeong, Gyu-Seob, Bae, Woorham, Jeong, Deog-Kyoon

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A 0.4-to-1 V Voltage Scalable \Delta \Sigma ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS von Park, Jun-Eun, Hwang, Young-Ha, Jeong, Deog-Kyoon

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A Practical Implementation of IEEE 1588-2008 Transparent Clock for Distributed Measurement and Control Systems von Han, Jiho, Jeong, Deog-Kyoon

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A 22 to 26.5 Gb/s Optical Receiver With All-Digital Clock and Data Recovery in a 65 nm CMOS Process von Chu, Sang-Hyeok, Bae, Woorham, Jeong, Gyu-Seob, Jang, Sungchun, Kim, Sungwoo, Joo, Jiho, Kim, Gyungock, Jeong, Deog-Kyoon

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A 12-Gbps, 0.24-pJ/b/dB PAM-4 Receiver with Dead-zone Free SS-MMSE PD for CIS Link von Shim, Minkyo, Lee, Woonghee, Lee, Yunhee, Park, Kwanseo, Jeong, Deog-Kyoon

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Use of Phase Delay Analysis for Evaluating Wideband Circuits: An Alternative to Group Delay Analysis von Woorham Bae, Nikolic, Borivoje, Deog-Kyoon Jeong

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Extension of Two-Port Sneak Current Cancellation Scheme to 3-D Vertical RRAM Crossbar Array von Bae, Woorham, Yoon, Kyung Jean, Hwang, Cheol Seong, Jeong, Deog-Kyoon

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A 2.5-5.6 GHz Subharmonically Injection-Locked All-Digital PLL With Dual-Edge Complementary Switched Injection von Cho, Sung-Yong, Kim, Sungwoo, Choo, Min-Seong, Ko, Han-Gon, Lee, Jinhyung, Bae, Woorham, Jeong, Deog-Kyoon

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Layout Synthesis and Loop Parameter Optimization of a Low-Jitter All-Digital Pixel Clock Generator von Kim, WooSeok, Park, Jaejin, Park, Hojin, Jeong, Deog-Kyoon

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An Optimum Loop Gain Tracking All-Digital PLL Using Autocorrelation of Bang-Bang Phase-Frequency Detection von Jang, Sungchun, Kim, Sungwoo, Chu, Sang-Hyeok, Jeong, Gyu-Seob, Kim, Yoonsoo, Jeong, Deog-Kyoon

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