Special Issue on Design of Fault-Tolerant Digital Circuits and Systems von Jeong, Hanwool

Volltext

Design of High-Speed, Low-Power Sensing Circuits for Nano-Scale Embedded Memory von Lee, Sangheon, Park, Gwanwoo, Jeong, Hanwool

Volltext

Power-Gated 9T SRAM Cell for Low-Energy Operation von Oh, Tae Woo, Jeong, Hanwool, Kang, Kyoman, Park, Juhyun, Yang, Younghwi, Jung, Seong-Ook

Volltext

High-Density SRAM Read Access Yield Estimation Methodology von Baek, Gidong, Jeong, Hanwool

Volltext

Design of Static Random-Access Memory Cell for Fault Tolerant Digital System von Yoon, Taehwan, Park, Jihwan, Jeong, Hanwool

Volltext

Comparative Study of Various Latch-Type Sense Amplifiers von Woo, Seung-Han, Kim, Jisu, Jeong, Hanwool, Jung, Seong-Ook

Volltext

Single Bit-Line 7T SRAM Cell for Near-Threshold Voltage Operation With Enhanced Performance and Energy in 14 nm FinFET Technology von Younghwi Yang, Hanwool Jeong, Seung Chul Song, Wang, Joseph, Yeap, Geoffrey, Seong-Ook Jung

Volltext

Pre-Charged Local Bit-Line Sharing SRAM Architecture for Near-Threshold Operation von Oh, Tae Woo, Jeong, Hanwool, Park, Juhyun, Jung, Seong-Ook

Volltext

Machine Learning-Based Read Access Yield Estimation and Design Optimization for High-Density SRAM von Yoon, Taehwan, Jeong, Hanwool

Volltext

Bitline Charge-Recycling SRAM Write Assist Circuitry for V} Improvement and Energy Saving von Jeong, Hanwool, Oh, Se Hyeok, Oh, Tae Woo, Kim, Hoonki, Park, Chang Nam, Rim, Woojin, Song, Taejoong, Jung, Seong-Ook

Volltext

SRAM Operational Mismatch Corner Model for Efficient Circuit Design and Yield Analysis von Choi, Tae Hoon, Jeong, Hanwool, Yang, Younghwi, Park, Juhyun, Jung, Seong-Ook

Volltext

Energy-Efficient Wide-Range Level Shifter With a Logic Error Detection Circuit von Park, Jihwan, Jeong, Hanwool

Volltext

Self-Shut-Off Pulsed Latches for Minimizing Sequencing Overhead von Park, Hyunho, Jeong, Hanwool

Volltext

An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache von Kim, Tae Hyun, Jeong, Hanwool, Park, Juhyun, Kim, Hoonki, Song, Taejoong, Jung, Seong-Ook

Volltext

Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM von Jeong, Hanwool, Kim, Taewon, Yang, Younghwi, Song, Taejoong, Kim, Gyuhong, Won, Hyo-sig, Jung, Seong-Ook

Volltext

Transient Cell Supply Voltage Collapse Write Assist Using Charge Redistribution von Kim, Kiryong, Jeong, Hanwool, Park, Juhyun, Jung, Seong-Ook

Volltext

Full-Swing Local Bitline SRAM Architecture Based on the 22-nm FinFET Technology for Low-Voltage Operation von Kang, Kyoman, Jeong, Hanwool, Yang, Younghwi, Park, Juhyun, Kim, Kiryong, Jung, Seong-Ook

Volltext

Variation-Aware Figure of Merit for Integrated Circuit in Near-Threshold Region von Hanwool Jeong, Younghwi Yang, Seung Chul Song, Wang, Joseph, Yeap, Geoffrey, Seong-Ook Jung

Volltext

Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM von Jeong, Hanwool, Kim, Taewon, Song, Taejoong, Kim, Gyuhong, Jung, Seong-Ook

Volltext

Design of a 22-nm FinFET-Based SRAM With Read Buffer for Near-Threshold Voltage Operation von Juhyun Park, Younghwi Yang, Hanwool Jeong, Seung Chul Song, Wang, Joseph, Yeap, Geoffrey, Seong-Ook Jung

Volltext