Improving accuracy, robustness and computational efficiency in 3D computer vision von Crossley, S., Seed, N.L., Thacker, N.A., Ivey, P.A.

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Continuous and high coverage self-testing of dynamically re-configurable systems von Zawada, A.C., Seed, N.L., Ivey, P.A.

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VLSI design course provides timely telecomms tutorial von Ivey, P.A.

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An array processor for general purpose digital image compression von Yates, R.B., Thacker, N.A., Evans, S.J., Walker, S.N., Ivey, P.A.

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A single chip video signal processing architecture for image processing, coding, and computer vision von Goodenough, J., Meacham, R.J., Morris, J.D., Luke Seed, N., Ivey, P.A.

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Utilizing a low cost 3D packaging technology for consumer applications von Larcombe, S.P., Stern, J.M., Ivey, P.A., Seed, L.

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A generalised convolver for computer vision von Seed, L., Lane, R.A., Thacker, N.A., Ivey, P.A.

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Performance simulation of a multicast input-indexed switch von Cruz, F.S., Ivey, P.A.

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VLSI design course provides timely telecomms tutorial: Y Tsividis and P Antognetti (Eds)‘Design of MOS VLSI for telecommunications applications’ Prentice-Hall, Englewood Cliffs, NJ... von Ivey, P.A.

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Defect tolerant SRAM based FPGAs von Kelly, J.L., Ivey, P.A.

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A Design Style for VLSI CMOS von Myers, D.J., Ivey, P.A.

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A 1.2 billion operations per second video signal processing chip von Yates, R., Evans, S., Ivey, P.A.

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Using genetic algorithms to automate system implementation in a novel three-dimensional packaging technology von Larcombe, S.P., Prendergast, D.J., Thacker, N.A., Ivey, P.A.

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A single-chip public key encryption subsystem von Ivey, P.A., Cox, A.L., Harbridge, J.R., Oldfield, J.K.

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Photolithography on Grossly Non-Planar Substrates von Williams, G.L., McWilliam, R., Maiden, A., Purvis, A., Ivey, P.A., Seed, N.L.

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Closed form analysis of a slotted ALOHA random access protocol in a mixed voice and data with a finite number of sessions in wireless communications von Mahdavi, M, Edwards, R.M, Ivey, P.A

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An Ultra-high Speed Public Key Encryption Processor von Ivey, P.A., Walker, S.N., Stern, J.M., Davidson, S.

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An ultra compact, low-cost, complete image-processing system von Stem, J.M., Ivey, P.A., Larcombe, S.P., Goodenough, N.J., Seed, N.L., Shelley, A.J.

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Silicon-on-insulator (SOI): A High Performance ASIC Technology von Stern, J.M., Ivey, P.A., Davidson, S., Walker, S.N.

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A software image coding system von Cozens, S, Ivey, P.A, Myers, D.J

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