A Mixed-Signal RISC-V Signal Analysis SoC Generator With a 16-nm FinFET Instance von Bailey, Steven, Rigge, Paul, Han, Jaeduk, Lin, Richard, Chang, Eric Y., Mao, Howard, Wang, Zhongkai, Markley, Chick, Izraelevitz, Adam M., Wang, Angie, Narevsky, Nathan, Bae, Woorham, Shauck, Steve, Montano, Sergio, Norsworthy, Justin, Razzaque, Munir, Ma, Wen Hau, Lentiro, Akalu, Doerflein, Matthew, Heckendorn, Darin, McGrath, Jim, DeSeta, Franco, Shoham, Ronen, Stellfox, Mike, Snowden, Mark, Cole, Joseph, Fuhrman, Daniel R., Richards, Brian, Bachrach, Jonathan, Alon, Elad, Nikolic, Borivoje

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Illustrating the Use of Statistical Experimental Design and Analysis for Multiresponse Prediction and Optimization von Izraelevitz, Adam M., Anderson-Cook, Christine M., Hamada, Michael S.

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Multi-core computer processor based on a dynamic core-level power management for enhanced overall power efficiency von Izraelevitz, Adam M, Shoemaker, Christine A, Petrica, Paula, Albonesi, David H

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Flicker: a dynamically adaptive architecture for power limited multicore systems von Petrica, Paula, Izraelevitz, Adam M., Albonesi, David H., Shoemaker, Christine A.

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MULTI-CORE COMPUTER PROCESSOR BASED ON A DYNAMIC CORE-LEVEL POWER MANAGEMENT FOR ENHANCED OVERALL POWER EFFICIENCY von IZRAELEVITZ ADAM M, ALBONESI DAVID H, PETRICA PAULA, SHOEMAKER CHRISTINE A

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