Probabilistic Temporal Logic Falsification of Cyber-Physical Systems von Abbas, Houssam, Fainekos, Georgios, Sankaranarayanan, Sriram, Ivančić, Franjo, Gupta, Aarti

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Reasoning About Threads Communicating via Locks von Kahlon, Vineet, Ivančić, Franjo, Gupta, Aarti

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Benchmarks for Hybrid Systems Verification von Fehnker, Ansgar, Ivančić, Franjo

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DC2: A framework for scalable, scope-bounded software verification von Ivancic, Franjo, Balakrishnan, Gogul, Gupta, Aarti, Sankaranarayanan, Sriram, Maeda, Naoto, Tokuoka, Hiroki, Imoto, Takashi, Miyazaki, Yoshiaki

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Efficient SAT-based bounded model checking for software verification von Ivančić, Franjo, Yang, Zijiang, Ganai, Malay K., Gupta, Aarti, Ashar, Pranav

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Counterexample-guided predicate abstraction of hybrid systems von Alur, Rajeev, Dang, Thao, Ivančić, Franjo

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Scalable and scope-bounded software verification in Varvel von Ivančić, Franjo, Balakrishnan, Gogul, Gupta, Aarti, Sankaranarayanan, Sriram, Maeda, Naoto, Imoto, Takashi, Pothengil, Rakesh, Hussain, Mustafa

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A hybrid nano-CMOS architecture for defect and fault tolerance von Simsir, Muzaffer O., Cadambi, Srihari, Ivančić, Franjo, Roetteler, Martin, Jha, Niraj K.

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Predicate abstraction for reachability analysis of hybrid systems von Alur, Rajeev, Dang, Thao, Ivancic, Franjo

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Disjunctive image computation for software verification von Wang, Chao, Yang, Zijiang, Ivančić, Franjo, Gupta, Aarti

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Mining library specifications using inductive logic programming von Sankaranarayanan, S., Ivancic, F., Gupta, A.

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Static Analysis in Disjunctive Numerical Domains von Sankaranarayanan, Sriram, Ivančić, Franjo, Shlyakhter, Ilya, Gupta, Aarti

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Hierarchical modeling and analysis of embedded systems von Alur, R., Thao Dang, Esposito, J., Yerang Hur, Ivancic, F., Kumar, V., Mishra, P., Pappas, G.J., Sokolsky, O.

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Feedback-directed unit test generation for C/C++ using concolic execution von Garg, Pranav, Ivancic, Franjo, Balakrishnan, Gogul, Maeda, Naoto, Gupta, Aarti

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Model checking sequential software programs via mixed symbolic analysis von Yang, Zijiang, Wang, Chao, Gupta, Aarti, Ivančić, Franjo

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Fault-Tolerant Computing Using a Hybrid Nano-CMOS Architecture von Simsir, Muzaffer O., Cadambi, Srihari, Ivancic, Franjo, Roetteler, Martin, Jha, Niraj K.

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Foreword: Special issue on numerical software verification von Ivančić, Franjo, Sankaranarayanan, Sriram, Wang, Chao

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Deciding Separation Logic Formulae by SAT and Incremental Negative Cycle Elimination von Wang, Chao, Ivančić, Franjo, Ganai, Malay, Gupta, Aarti

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Reachability Analysis of Hybrid Systems via Predicate Abstraction von Alur, Rajeev, Dang, Thao, Ivančić, Franjo

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Bitwidth Reduction via Symbolic Interval Analysis for Software Model Checking von Zaks, A., Zijiang Yang, Shlyakhter, I., Ivancic, F., Cadambi, S., Ganai, M.K., Gupta, A., Ashar, P.

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