Nickel nanoparticle deposition at room temperature for memory applications von Verrelli, E., Tsoukalas, D., Giannakopoulos, K., Kouvatsos, D., Normand, P., Ioannou, D.E.

Volltext

Metrology for the Electrical Characterization of Semiconductor Nanowires von Richter, Curt A., Xiong, Hao D., Zhu, Xiaoxiao, Wang, Wenyong, Stanford, Vincent M., Hong, Woong-Ki, Lee, Takhee, Ioannou, Dimitris E., Li, Qiliang

Volltext

Silicon nanowire NVM cell using high- k dielectric charge storage layer von Zhu, X., Yang, Y., Li, Q., Ioannou, D.E., Suehle, J.S., Richter, C.A.

Volltext

ESD performance of 65 nm partially depleted n and p channel SOI MOSFETs von MISHRA, R, IOANNOU, D. E, MITRA, S, GAUTHIER, R, SEGUIN, C, HALBACH, R

Volltext

Silicon nanowire on oxide/nitride/oxide for memory application von Li, Qiliang, Zhu, Xiaoxiao, Xiong, Hao D, Koo, Sang-Mo, Ioannou, D E, Kopanski, Joseph J, Suehle, J S, Richter, C A

Volltext

Some issues of hot-carrier degradation and negative bias temperature instability of advanced SOI CMOS transistors von Ioannou, D.P., Ioannou, D.E.

Volltext

Effect of Floating-Body and Stress Bias on NBTI and HCI on 65-nm SOI pMOSFETs von Mishra, R., Ioannou, D.E., Mitra, S., Gauthier, R.

Volltext

Single event effects in PDSOI 4 M SRAM fabricated in UNIBOND von Liu, S.T., Heikkila, W.W., Golke, K.W., Anthony, D., Hurst, A., Kirchner, G., Jenkins, W.C., Hughes, H.L., Mitra, S., Ioannou, D.E.

Volltext

Silicon nanowire NVM with high-k gate dielectric stack von Zhu, Xiaoxiao, Gu, D., Li, Qiliang, Ioannou, D.E., Baumgart, H., Suehle, J.S., Richter, C.A.

Volltext

Scaling limits and reliability of SOI CMOS technology von Ioannou, D E

Volltext

Gated-diode characterization of the back-channel interface on irradiated SOI wafers von Lawrence, R.K., Ioannou, D.E., Jenkins, W.C., Liu, S.T.

Volltext

Worst case stress conditions for hot carrier induced degradation of p-channel SOI MOSFETs von Ioannou, D.P., Mishra, R., Ioannou, D.E., Liu, S.T., Hughes, H.L.

Volltext

Concurrent HCI-NBTI: worst case degradation condition for 65 nm p-channel SOI MOSFETs von Mishra, R., Mitra, S., Gauthier, R., Ioannou, D.E., Seguin, C., Halbach, R.

Volltext

Concurrent HCI-NBTI : worst case degradation condition for 65nm p-channel SOI MOSFETs von MISHRA, R, MITRA, S, GAUTHIER, R, IOANNOU, D. E, SEGUIN, C, HALBACH, R

Volltext

Adaptation of the charge pumping technique to gated p-i-n diodes fabricated on silicon on insulator von Ouisse, T., Cristoloveanu, S., Elewa, T., Haddara, H., Borel, G., Ioannou, D.E.

Volltext

Characterization of carrier generation in enhancement-mode SOI MOSFET's von Ioannou, D.E., Cristoloveanu, S., Mukherjee, M., Mazhari, B.

Volltext

Hot-electron-induced degradation of front and back channels in partially and fully depleted SIMOX MOSFETs von Cristoloveanu, S., Gulwadi, S.M., Ioannou, D.E., Campisi, G.J., Hughes, H.L.

Volltext

Transient thermal simulations of a three-dimensional unit cell in power control systems and high-power microwave devices von Buot, F.A, Mittereder, J.A, Anderson, W.T, Ioannou, D.E

Volltext

Surface potential at threshold in thin-film SOI MOSFET's von Mazhari, B., Ioannou, D.E.

Volltext

Investigation of carrier generation in fully depleted enhancement and accumulation mode SOI MOSFET's von Sinha, S.P., Zaleski, A., Ioannou, D.E.

Volltext