Suchergebnisse - Hsien-Nan Chiu

1

A novel poly-Si thin-film transistor with multi-trenched body by using Isotropic-etching for Suppressing Off-State Leakage von Hsien-Nan Chiu, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hiesh Lin, Tzu-Feng Chang, Chih-Hung Sun, Chih-Hao Kuo, Hsuan-Hsu Chen

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2

Future of planar self-aligned block oxide based MOSFET technology von Jyi-Tsong Lin, Yi-Chuen Eng, Chih-Hao Kuo, Tzu-Feng Chang, Chih-Hung Sun, Po-Hsieh Lin, Hsien-Nan Chiu, Hsuan-Hsu Chen

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3

A simple process of thin-film transistor using the trench-oxide layer for improving 1T-DRAM performance von Hsien-Nan Chiu, Jyi-Tsong Lin, Yi-Chuen Eng, Tzu-Feng Chang, Cheng-Hsin Chen

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4

A novel vertical MOSFET with bMPI structure for 1T-DRAM application von Cheng-Hsin Chen, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hsieh Lin, Hsien-Nan Chiu, Tzu-Feng Chang, Chih-Hsuan Tai, Kuan-Yu Lu, Yi-Hsuan Fan, Yu-Che Chang, Hsuan-Hsu Chen

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5

Numerical study of non-classical unipolar CMOS with different embedded oxide and gate length von Chih-Hung Sun, Jyi-Tsong Lin, Hsuan-Hsu Chen, Yi-Chuen Eng, Chih-Hao Kuo, Tze-Feng Chang, Chun-Yu Chen, Po-Hsieh Lin, Hsien-Nan Chiu

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6

Characteristics of a new trench-oxide thin-film transistor and its 1T-DRAM applications von Hsien-Nan Chiu, Jyi-Tsong Lin, Yi-Chuen Eng, Tzu-Feng Chang, Chih-Hung Sun, Po-Hiesh Lin, Chih-Hao Kuo, Hsuan-Hsu Chen, Cheng-Hsin Chen

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7

Reliability analysis of a new vertical MOSFET with bMPI structure for 1T-DRAM applications von Cheng-Hsin Chen, Jyi-Tsong Lin, Po-Hsieh Lin, Yi-Chuen Eng, Hsien-Nan Chiu, Tzu-Feng Chang, Hsuan-Hsu Chen

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8

Thermal characteristics of an advanced bMPI-based 1T-DRAM cell von Cheng-Hsin Chen, Jyi-Tsong Lin, Yi-Chuen Eng, Hsien-Nan Chiu, Tzu-Feng Chang, Yi-Hsuan Fan, Yu-Che Chang, Kuan-Yu Lu, Chih-Hsuan Tai

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9

Advanced block oxide MOSFETs for 25 nm technology node von Chih-Hung Sun, Jyi-Tsong Lin, Yi-Chuen Eng, Tzu-Feng Chang, Po-Hiesh Lin, Hsuan-Hsu Chen, Chih-Hao Kuo, Hsien-Nan Chiu

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10

Improving reliability and diminishing parasitic capacitance effects in a vertical transistor with embedded gate von Jyi-Tsong Lin, Chih-Hao Kuo, Tai-Yi Lee, Yi-Chuen Eng, Tzu-Feng Chang, Po-Hsieh Lin, Hsuan-Hsu Chen, Chih-Hung Sun, Hsien-Nan Chiu

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11

A novel self-align double gate MOSFET with source/drain tie von Po-Hsieh Lin, Jyi-Tsong Lin, Yi-Chuen Eng, Hsuan-Hsu Chen, Chih-Hao Kuo, Chih-Hung Sun, Hsien-Nan Chiu, Tzu-Feng Chang, Nai-Chuan Chuang

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12

Characteristics of a Local Oxidation of silicon multi-tie body polysilicon thin-film transistor von Hsien-Nan Chiu, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hiesh Lin, Tzu-Feng Chang, Chih-Hung Sun, Hsuan-Hsu Chen, Chih-Hao Kuo

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13

The impact of junction depth on vertical sidewall MOSFETs with embedded gate von Chih-Hao Kuo, Jyi-Tsong Lin, Tai-Yi Lee, Yi-Chuen Eng, Tzu-Feng Chang, Po-Hsieh Lin, Hsuan-Hsu Chen, Chih-Hung Sun, Hsien-Nan Chiu

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14

A simulation study of source/drain-tie effects on characteristics of self-aligned π-shaped source/drain ultrathin SOI FETs von Yi-Chuen Eng, Jyi-Tsong Lin, Tzu-Feng Chang, Chih-Hao Kuo, Po-Hsieh Lin, Chih-Hung Sun, Hsien-Nan Chiu, Hsuan-Hsu Chen

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15

Self-aligned SOI MOSFETs with Ω-shaped conductive layer and source/drain-tie von Jyi-Tsong Lin, Tzu-Feng Chang, Yi-Chuen Eng, Hsuan-Hsu Chen, Chih-Hao Kuo, Chih-Hung Sun, Po-Hiesh Lin, Hsien-Nan Chiu

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A novel poly-Si thin-film transistor with multi-trenched body by using Isotropic-etching for Suppressing Off-State Leakage von Hsien-Nan Chiu, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hiesh Lin, Tzu-Feng Chang, Chih-Hung Sun, Chih-Hao Kuo, Hsuan-Hsu Chen

Future of planar self-aligned block oxide based MOSFET technology von Jyi-Tsong Lin, Yi-Chuen Eng, Chih-Hao Kuo, Tzu-Feng Chang, Chih-Hung Sun, Po-Hsieh Lin, Hsien-Nan Chiu, Hsuan-Hsu Chen

A simple process of thin-film transistor using the trench-oxide layer for improving 1T-DRAM performance von Hsien-Nan Chiu, Jyi-Tsong Lin, Yi-Chuen Eng, Tzu-Feng Chang, Cheng-Hsin Chen

A novel vertical MOSFET with bMPI structure for 1T-DRAM application von Cheng-Hsin Chen, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hsieh Lin, Hsien-Nan Chiu, Tzu-Feng Chang, Chih-Hsuan Tai, Kuan-Yu Lu, Yi-Hsuan Fan, Yu-Che Chang, Hsuan-Hsu Chen

Numerical study of non-classical unipolar CMOS with different embedded oxide and gate length von Chih-Hung Sun, Jyi-Tsong Lin, Hsuan-Hsu Chen, Yi-Chuen Eng, Chih-Hao Kuo, Tze-Feng Chang, Chun-Yu Chen, Po-Hsieh Lin, Hsien-Nan Chiu

Characteristics of a new trench-oxide thin-film transistor and its 1T-DRAM applications von Hsien-Nan Chiu, Jyi-Tsong Lin, Yi-Chuen Eng, Tzu-Feng Chang, Chih-Hung Sun, Po-Hiesh Lin, Chih-Hao Kuo, Hsuan-Hsu Chen, Cheng-Hsin Chen

Reliability analysis of a new vertical MOSFET with bMPI structure for 1T-DRAM applications von Cheng-Hsin Chen, Jyi-Tsong Lin, Po-Hsieh Lin, Yi-Chuen Eng, Hsien-Nan Chiu, Tzu-Feng Chang, Hsuan-Hsu Chen

Thermal characteristics of an advanced bMPI-based 1T-DRAM cell von Cheng-Hsin Chen, Jyi-Tsong Lin, Yi-Chuen Eng, Hsien-Nan Chiu, Tzu-Feng Chang, Yi-Hsuan Fan, Yu-Che Chang, Kuan-Yu Lu, Chih-Hsuan Tai

Advanced block oxide MOSFETs for 25 nm technology node von Chih-Hung Sun, Jyi-Tsong Lin, Yi-Chuen Eng, Tzu-Feng Chang, Po-Hiesh Lin, Hsuan-Hsu Chen, Chih-Hao Kuo, Hsien-Nan Chiu

Improving reliability and diminishing parasitic capacitance effects in a vertical transistor with embedded gate von Jyi-Tsong Lin, Chih-Hao Kuo, Tai-Yi Lee, Yi-Chuen Eng, Tzu-Feng Chang, Po-Hsieh Lin, Hsuan-Hsu Chen, Chih-Hung Sun, Hsien-Nan Chiu

A novel self-align double gate MOSFET with source/drain tie von Po-Hsieh Lin, Jyi-Tsong Lin, Yi-Chuen Eng, Hsuan-Hsu Chen, Chih-Hao Kuo, Chih-Hung Sun, Hsien-Nan Chiu, Tzu-Feng Chang, Nai-Chuan Chuang

Characteristics of a Local Oxidation of silicon multi-tie body polysilicon thin-film transistor von Hsien-Nan Chiu, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hiesh Lin, Tzu-Feng Chang, Chih-Hung Sun, Hsuan-Hsu Chen, Chih-Hao Kuo

The impact of junction depth on vertical sidewall MOSFETs with embedded gate von Chih-Hao Kuo, Jyi-Tsong Lin, Tai-Yi Lee, Yi-Chuen Eng, Tzu-Feng Chang, Po-Hsieh Lin, Hsuan-Hsu Chen, Chih-Hung Sun, Hsien-Nan Chiu

A simulation study of source/drain-tie effects on characteristics of self-aligned π-shaped source/drain ultrathin SOI FETs von Yi-Chuen Eng, Jyi-Tsong Lin, Tzu-Feng Chang, Chih-Hao Kuo, Po-Hsieh Lin, Chih-Hung Sun, Hsien-Nan Chiu, Hsuan-Hsu Chen

Self-aligned SOI MOSFETs with Ω-shaped conductive layer and source/drain-tie von Jyi-Tsong Lin, Tzu-Feng Chang, Yi-Chuen Eng, Hsuan-Hsu Chen, Chih-Hao Kuo, Chih-Hung Sun, Po-Hiesh Lin, Hsien-Nan Chiu

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