Transient nature of negative capacitance in ferroelectric field-effect transistors von Ng, Kwok, Hillenius, Steven J., Gruverman, Alexei

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Change of editor-in-chief von Hillenius, S.J.

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Transient Nature of Negative Capacitance in Ferroelectric Field-Effect Transistors von Ng, Kwok, Hillenius, Steven J, Gruverman, Alexei

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Process limitation and device design tradeoffs of self-aligned TiSi2 junction formation in submicrometer CMOS devices von CHIH-YUAN LU, JANMYE JAMES SUNG, RUICHEN LIU, NUN-SIAN TSAI, RANBIR SINGH, HILLENIUS, S. J, KIRSCH, H. C

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Ultra-fast (0.5- mu m) CMOS circuits in fully depleted SOI films von Kamgar, A., Hillenius, S.J., Cong, H.-I.L., Field, R.L., Lindenberger, W.S., Celler, G.K., Trimble, L.E., Sheng, T.T.

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High-performance salicide shallow-junction CMOS devices for submicrometer VLSI application in twin-tub VI von Lu, C.-Y., Sung, J.J., Kirsch, H.C., Tsai, N.-S., Liu, R., Manocha, A.S., Hillenius, S.J.

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Multigigahertz CMOS dual-modulus prescalar IC von HONG-IH CONG, ANDREWS, J. M, BOULIN, D. M, SAN-CHIN FANG, HILLENIUS, S. J, MICHEJDA, J. A

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Self-powered device von HILLENIUS, STEVEN J

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A high-performance directly insertable self-aligned ultra-rad-hard and enhanced isolation field-oxide technology for gigahertz silicon NMOS/CMOS VLSI von Manchanda, L., Hillenius, S.J., Lynch, W.T., Cong, H., Ng, K.K., Field, R.L.

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A high-performance directly insertable self-aligned ultra-radiation-hard and enhanced isolation field-oxide technology for gigahertz Si-CMOS VLSI von Manchanda, L., Hillenius, S.J., Lynch, W.T., Cong, H.I.

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Self-powered device von HILLENIUS, STEVEN J

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Self-powered device von HILLENIUS, STEVEN J

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Planare Isoliertechnik für integrierte Schaltungen von HILLENIUS, STEVEN J, VAIDYA, SHIELA, MANCHANDA, LALITA, LYNCH, WILLIAM THOMAS, PINTO, MARK RICHARD

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Planar isolation technique for integrated circuits von HILLENIUS, STEVEN J, VAIDYA, SHIELA, MANCHANDA, LALITA, LYNCH, WILLIAM THOMAS, PINTO, MARK RICHARD

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Selbstversorgende Vorrichtung von HILLENIUS, STEVEN J

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Planare Isoliertechnik für integrierte Schaltungen von HILLENIUS, STEVEN J, VAIDYA, SHEILA, MANCHANDA, LALITA, LYNCH, WILLIAM THOMAS, PINTO, MARK RICHARD

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Planar isolation technique for integrated circuits von HILLENIUS, STEVEN J, VAIDYA, SHEILA, MANCHANDA, LALITA, LYNCH, WILLIAM THOMAS, PINTO, MARK RICHARD

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CMOS INTEGRATED CIRCUIT TECHNOLOGY von HILLENIUS, STEVEN J, PARRILLO, LOUIS C

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CMOS Integrated circuit technology utilizing dual implantation of slow and fast diffusing donor ions to form the n-well von PARRILLO, LOUIS C, HILLENIUS, STEVEN J

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Planar isolation technique for integrated circuits von HILLENIUS, STEVEN J, VAIDYA, SHIELA, MANCHANDA, LALITA, LYNCH, WILLIAM THOMAS, PINTO, MARK RICHARD

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