Large-signal 2T, 1C DRAM cell: signal and layout analysis von Henkels, W.H., Hwang, W.

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Accurate measurement of small inductances or penetration depths in superconductors von Henkels, W. H.

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A 4-Mb low-temperature DRAM von Henkels, W.H., Wen, D.-S., Mohler, R.L., Franch, R.L., Bucelot, T.J., Long, C.W., Bracchitta, J.A., Cote, W.J., Bronner, G.B., Taur, Y., Dennard, R.H.

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Internal node probing of a DRAM with a low-temperature e-beam tester von Jenkins, K.A., Henkels, W.H.

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Fundamental criteria for the design of high-performance Josephson nondestructive readout random access memory cells and experimental confirmation von Henkels, W. H.

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Self-contained measurement of thin-film superconducting penetration depths and nonsuperconducting film thicknesses in Josephson integrated circuits von HENKELS, W. H

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Penetration depth measurements on type II superconducting films von Henkels, W., Kircher, C.

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A new failure mode of radiation-induced soft errors in dynamic memories von Rajeevakumar, T.V., Lu, N.C.C., Henkels, W.H., Hwang Wei, Franch, R.

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A 12-ns low-temperature DRAM von Henkels, W.H., Lu, N.C.C., Hwang, W., Rajeevakumar, T.V., Franch, R.L., Jenkins, K.A., Bucelot, T.J., Heidel, D.F., Immediato, M.J.

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A 22-ns 1-Mbit CMOS high-speed DRAM with address multiplexing von Lu, N.C.-C., Bronner, G.B., Kitamura, K., Scheuerlein, R.E., Henkels, W.H., Dhong, S.H., Katayama, Y., Kirihata, T., Niijima, H., Franch, R.L., Wang, W., Nishiwaki, M., Pesavento, F.L., Rajeevakumar, T.V., Sakaue, Y., Suzuki, Y., Iguchi, Y., Yano, E.

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An elementary logic circuit employing superconducting Josephson tunneling gates von Henkels, W.

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Josephson 4 K-bit cache memory design for a prototype signal processor. I: General overview von HENKELS, W. H, GEPPERT, L. M, KADLEC, J, EPPERLEIN, P. W, BEHA, H, CHANG, W. H, JAECKEL, H

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An experimental memory cell using edge-junction gates von Geppert, L., Rajeevakumar, T., Henkels, W., Deutsch, U.

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500-MHz, 32-word x 64-bit, eight-port self-resetting CMOS register file von Hwang, Wei, Joshi, Rajiv V, Henkels, Walter H

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A 500-MHz, 32-wordx 64-bit, eight-port self-resetting CMOSregister file von Hwang, Wei, Joshi, R V, Henkels, W H

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A 500-MHz, 32-word64-bit, eight-port self-resetting CMOS register file von Hwang, Wei, Joshi, R V, Henkels, W H

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Intrinsic Fluctuations in the Driven Josephson Oscillator von Henkels, W. H., Webb, W. W.

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Josephson 4 K-bit cache memory design for a prototype signal processor. III: Decoding, sensing, and timing von HENKELS, W. H, GEPPERT, L. M, KADLEC, J, EPPERLEIN, P. W, BEHA, H, CHANG, W. H, JAECKEL, H

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Experimental single flux quantum NDRO Josephson memory cell von Henkels, W.H., Greiner, J.H.

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Thermoelectric Power and Mobility of Carriers in Selenium von Henkels, Herbert W.

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