Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory) von Dae Hyun Kim, Athikulwongse, Krit, Healy, Michael B., Hossain, Mohammad M., Moongon Jung, Khorosh, Ilya, Kumar, Gokul, Young-Joon Lee, Lewis, Dean L., Tzu-Wei Lin, Chang Liu, Panth, Shreepad, Pathak, Mohit, Minzhen Ren, Guanhao Shen, Taigon Song, Dong Hyuk Woo, Xin Zhao, Joungho Kim, Ho Choi, Loh, Gabriel H., Lee, Hsien-Hsin S., Sung Kyu Lim

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Encoding a magic state with beyond break-even fidelity von Gupta, Riddhi S., Sundaresan, Neereja, Alexander, Thomas, Wood, Christopher J., Merkel, Seth T., Healy, Michael B., Hillenbrand, Marius, Jochym-O’Connor, Tomas, Wootton, James R., Yoder, Theodore J., Cross, Andrew W., Takita, Maika, Brown, Benjamin J.

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Distributed TSV Topology for 3-D Power-Supply Networks von Healy, M. B., Sung Kyu Lim

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A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design von Mohamood, Fayez, Healy, Michael B., Lim, Sung Kyu, Lee, Hsien-Hsin S.

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Power delivery system architecture for many-tier 3D systems von Healy, Michael B, Sung Kyu Lim

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Integrated microarchitectural floorplanning and run-time controller for inductive noise mitigation von Healy, Michael B., Mohamood, Fayez, Lee, Hsien-Hsin S., Lim, Sung Kyu

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Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory von Healy, M B, Athikulwongse, K, Goel, R, Hossain, M M, Kim, D H, Young-Joon Lee, Lewis, D L, Tzu-Wei Lin, Chang Liu, Moongon Jung, Ouellette, B, Pathak, M, Sane, H, Guanhao Shen, Dong Hyuk Woo, Xin Zhao, Loh, G H, Lee, H S, Sung Kyu Lim

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Power management of multi-core chips: Challenges and pitfalls von Bose, P., Buyuktosunoglu, A., Darringer, J. A., Gupta, M. S., Healy, M. B., Jacobson, H., Nair, I., Rivers, J. A., Shin, J., Vega, A., Weger, A. J.

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Power management of multi-core chips: challenges and pitfalls von Bose, Pradip, Buyuktosunoglu, Alper, Darringer, John A., Gupta, Meeta S., Healy, Michael B., Jacobson, Hans, Nair, Indira, Rivers, Jude A., Shin, Jeonghee, Vega, Augusto, Weger, Alan J.

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Design and architecture of the IBM Quantum Engine Compiler von Healy, Michael B, Jokar, Reza, Thomas, Soolu, Pascuzzi, Vincent R, Barton, Kit, Alexander, Thomas A, Elkabetz, Roy, Donovan, Brian C, Horii, Hiroshi, Hillenbrand, Marius

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Encoding a magic state with beyond break-even fidelity von Gupta, Riddhi S, Sundaresan, Neereja, Alexander, Thomas, Wood, Christopher J, Merkel, Seth T, Healy, Michael B, Hillenbrand, Marius, Jochym-O'Connor, Tomas, Wootton, James R, Yoder, Theodore J, Cross, Andrew W, Takita, Maika, Brown, Benjamin J

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Touch\'e: Towards Ideal and Efficient Cache Compression By Mitigating Tag Area Overheads von Hong, Seokin, Abali, Bulent, Buyuktosunoglu, Alper, Healy, Michael B, Nair, Prashant J

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Design and architecture of the IBM Quantum Engine Compiler von Healy, Michael B, Jokar, Reza, Soolu, Thomas, Pascuzzi, Vincent R, Barton, Kit, Alexander, Thomas A, Elkabetz, Roy, Donovan, Brian C, Horii, Hiroshi, Hillenbrand, Marius

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Latency-agnostic memory controller von Karkhanis, Tejas, Emma, Philip G, Healy, Michael B

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Servicing indirect data storage requests with multiple memory controllers von Karkhanis, Tejas, Emma, Philip G, Healy, Michael B, Lin, Ching-Pei

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LATENCY-AGNOSTIC MEMORY CONTROLLER von Karkhanis, Tejas, Emma, Philip G, Healy, Michael B

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Memory system with switchable operating bands von Kim, Kyu-hyoun, Hunter, Hillery C, Healy, Michael B

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Partitioned memory with locally aggregated copy pools von Karkhanis, Tejas, Emma, Philip G, Healy, Michael B, Lin, Ching-Pei

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Partitioned memory with locally aggregated copy pools von Karkhanis, Tejas, Emma, Philip G, Healy, Michael B, Lin, Ching-Pei

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MEMORY SYSTEM WITH SWITCHABLE OPERATING BANDS von Healy Michael B, Hunter Hillery C, Kim Kyu-hyoun

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