Highly Reliable Quadruple-Node Upset-Tolerant D-Latch von Hatefinasab, Seyedehsomayeh, Ohata, Akiko, Salinas, Alfonso, Castillo, Encarnacion, Rodriguez, Noel

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Rule-Based Design for Low-Cost Double-Node Upset Tolerant Self-Recoverable D-Latch von Hatefinasab, Seyedehsomayeh, Medina-Garcia, Alfredo, Morales, Diego P., Castillo, Encarnacion, Rodriguez, Noel

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An Analogue Multiplier using CNTFET Technology von Hatefinasab, Seyedehsomayeh

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Low-Cost Soft Error Robust Hardened D-Latch for CMOS Technology Circuit von Hatefinasab, Seyedehsomayeh, Rodriguez, Noel, García, Antonio, Castillo, Encarnacion

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