Power efficient synchronous counter design von Katreepalli, Raghava, Haniotakis, Themistoklis

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More Efficient Testing of Metal-Oxide Memristor-Based Memory von Mozaffari, Seyed Nima, Tragoudas, Spyros, Haniotakis, Themistoklis

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A Generalized Approach to Implement Efficient CMOS-Based Threshold Logic Functions von Mozaffari, Seyed Nima, Tragoudas, Spyros, Haniotakis, Themistoklis

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Delay Analysis for Current Mode Threshold Logic Gate Designs von Dara, Chandra Babu, Haniotakis, Themistoklis, Tragoudas, Spyros

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ATPG for Delay Defects in Current Mode Threshold Logic Circuits von Palaniswamy, Ashok Kumar, Tragoudas, Spyros, Haniotakis, Themistoklis

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A current monitoring technique for IDDQ testing in digital integrated circuits von Matakias, Sotiris, Tsiatouhas, Yiorgos, Arapoyanni, Angela, Haniotakis, Themistoklis

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A current monitoring technique for I testing in digital integrated circuits von Matakias, Sotiris, Tsiatouhas, Yiorgos, Arapoyanni, Angela, Haniotakis, Themistoklis

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A current monitoring technique for I sub(DDQ) testing in digital integrated circuits von Matakias, Sotiris, Tsiatouhas, Yiorgos, Arapoyanni, Angela, Haniotakis, Themistoklis

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Securing sensor networks: A novel approach that combines encoding, uncorrelation and node disjoint transmission von Stewart, Khadija, Haniotakis, Themistoklis, Tragoudas, Spyros

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Design of a Reformed Array Logic Binary Multiplier for High-Speed Computations von Mohammad, Sakib, Haniotakis, Themistoklis

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A Data Capturing Method for Buses on Chip von Skoufis, Michael N, Karmarkar, Kedar, Tragoudas, Spyros, Haniotakis, Themistoklis

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Low power and high speed current-mode memristor-based TLGs von Dara, Chandra Babu, Haniotakis, Themistoklis, Tragoudas, Spyros

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A Methodology for Transistor-Efficient Supergate Design von Kagaris, D., Haniotakis, T.

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Design of a Reformed Array Logic Binary Multiplier for High-Speed Computations von Sakib Mohammad, Haniotakis, Themistoklis

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A Current Mode, Parallel, Two-Rail Code Checker von Matakias, Sotirios, Tsiatouhas, Yiorgos, Haniotakis, Themistoklis, Arapoyanni, Angela

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A Design Technique for Energy Reduction in NORA CMOS Logic von Limniotis, K., Tsiatouhas, Y., Haniotakis, T., Arapoyanni, A.

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A Metric for Weight Assignment to Optimize the Performance of MOBILE Threshold Logic Gate von Dara, C. B., Tragoudas, S., Haniotakis, T.

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Transistor-Level Synthesis for Low-Power Applications von Kagaris, D., Haniotakis, T.

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Testable Designs of Multiple Precharged Domino Circuits von Haniotakis, T., Tsiatouhas, Y., Nikolos, D., Efstathiou, C.

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A unified framework for generating all propagation functions for logic errors and events von Michael, M.K., Haniotakis, T., Tragoudas, S.

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