Cool Interconnect: A 1024-bit Wide Bus for Chip-to-Chip Communications in 3-D Integrated Circuits von Melamed, Samson, Imura, Fumito, Nakagawa, Hiroshi, Kikuchi, Katsuya, Hagimoto, Michiya, Matsumoto, Yukoh, Aoyagi, Masahiro

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Impact of die thinning on the thermal performance of a central TSV bus in a 3D stacked circuit von Melamed, Samson, Imura, Fumito, Nakagawa, Hiroshi, Kikuchi, Katsuya, Hagimoto, Michiya, Matsumoto, Yukoh, Aoyagi, Masahiro

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Wide bus chip-to-chip interconnection technology using fine pitch bump joint array for 3D LSI chip stacking von Aoyagi, M., Imura, F., Nemoto, S., Watanabe, N., Kato, F., Kikuchi, K., Nakagawa, H., Hagimoto, M., Uchida, H., Matsumoto, Y.

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COOL interconnect low power interconnection technology for scalable 3D LSI design von Chacin, M., Uchida, H., Hagimoto, M., Miyazaki, T., Ohkawa, T., Ikeno, R., Matsumoto, Y., Imura, F., Suzuki, M., Kikuchi, K., Nakagawa, H., Aoyagi, M.

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Manycore processor for video mining applications von Matsumoto, Y., Uchida, H., Hagimoto, M., Hibi, Y., Torii, S., Izumida, M.

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Cool System scalable 3-D stacked heterogeneous Multi-Core / Multi-Chip architecture for ultra low-power digital TV applications von Matsumoto, Y., Morimoto, T., Hagimoto, M., Uchida, H., Hikichi, N., Imura, F., Nakagawa, H., Aoyagi, M.

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