Physical Modeling of Gate-Controlled Schottky Barrier Lowering of Metal-Graphene Contacts in Top-Gated Graphene Field-Effect Transistors von Mao, Ling-Feng, Ning, Huansheng, Huo, Zong-Liang, Wang, Jin-Yan

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Charge Loss Characteristics of Different Al Contents in a HfAlO Trapping Layer Investigated by Variable Temperature Kelvin Probe Force Microscopy von Zhang, Dong, Huo, Zong-Liang, Jin, Lei, Han, Yu-Long, Chu, Yu-Qiong, Chen, Guo-Xing, Liu, Ming, Yang, Bao-He

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A simple and accurate method for measuring program/erase speed in a memory capacitor structure von 金林 张满红 霍宗亮 王永 余兆安 姜丹丹 陈军宁 刘明

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Improved charge trapping flash device with Al2O3/HfSiO stack as blocking layer von Zheng, Zhi-Wei (志威 郑), Huo, Zong-Liang (宗亮 霍), Zhu, Chen-Xin (晨昕 朱), Xu, Zhong-Guang (中广 许), Liu, Jing (璟刘), Liu, Ming (明刘)

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Comparison between N 2 and O 2 anneals on the integrity of an Al 2 O 3 /Si 3 N 4 /SiO 2 /Si memory gate stack von Chu, Yu-Qiong, Zhang, Man-Hong, Huo, Zong-Liang, Liu, Ming

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Comparison between N sub(2) and O sub(2) anneals on the integrity of an Al sub(2)O sub(3)/Si sub(3)N sub(4)/SiO sub(2)/Si memory gate stack von Chu, Yu-Qiong, Zhang, Man-Hong, Huo, Zong-Liang, Liu, Ming

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Comparison between N2 and O2 anneals on the integrity of an Al2O3/SiaN4/SiO2/Si memory gate stack von Chu Yu-Qiong Zhang Man-Hong Huo Zong-Liang Liu Ming

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A 1G-cell floating-gate NOR flash memory in 65 nm technology with 100 ns random access time von Liu, LiFang, Wu, Dong, Liu, XueMei, Huo, ZongLiang, Liu, Ming, Pan, LiYang

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A write buffer design based on stable and area-saving embedded SRAM for flash applications von Cao, HuaMin, Huo, ZongLiang, Wang, Yu, Li, Ting, Liu, Jing, Jin, Lei, Jiang, Dan-Dan, Zhang, DengJun, Li, Di, Liu, Ming

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Effect of high temperature annealing on the performance of MANOS charge trapping memory von Jin, Lin, Zhang, ManHong, Huo, ZongLiang, Yu, ZhaoAn, Jiang, DanDan, Wang, Yong, Bai, Jie, Chen, JunNing, Liu, Ming

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Improved charge trapping flash device with Al 2 O 3 /HfSiO stack as blocking layer von Zheng, Zhi-Wei, Huo, Zong-Liang, Zhu, Chen-Xin, Xu, Zhong-Guang, Liu, Jing, Liu, Ming

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Analyzing trap generation in silicon-nanocrystal memory devices using capacitance and current measurement von Yang, XiaoNan, Zhang, ManHong, Wang, Yong, Huo, ZongLiang, Long, ShiBing, Zhang, Bo, Liu, Jing, Liu, Ming

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Band Engineered Charge Trap Layer for highly Reliable MLC Flash Memory von Huo, ZongLiang, Yang, JunKyu, Lim, SeungHyun, Baik, SeungJae, Lee, Juyul, Han, JeongHee, Yeo, In-Seok, Chung, U-In, Moon, Joo Tae, Ryu, Byung-II

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Three-dimension (3D) memory device von HUO, ZONG-LIANG

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Memory device von LIU, JUN, HUO, ZONG-LIANG

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Memory device von LIU, JUN, HUO, ZONG-LIANG

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Memory device and method of forming the memory device von LIU, JUN, HUO, ZONG-LIANG

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Three-dimensional memory device von ZHOU, WENXI, HUO, ZONG-LIANG, XIA, ZHI-LIANG, ZHANG, KUN

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Three-dimensional memory device and method for forming the same von WANG, DI, ZHANG, ZHONG, XIE, WEI, ZHOU, WENXI, HUO, ZONG-LIANG, XIA, ZHI-LIANG

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Three-dimensional memory device and system thereof von WANG, DI, ZHANG, ZHONG, XIE, WEI, ZHOU, WENXI, HUO, ZONG-LIANG, XIA, ZHI-LIANG

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