A Palmprint Recognition Algorithm Using Phase-Only Correlation von ITO, Koichi, AOKI, Takafumi, NAKAJIMA, Hiroshi, KOBAYASHI, Koji, HIGUCHI, Tatsuo

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Application of symbolic computer algebra to arithmetic circuit verification von Watanabe, Y., Homma, N., Aoki, T., Higuchi, T.

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A fingerprint recognition algorithm combining phase-based image matching and feature-based matching von ITO, Koichi, MORITA, Ayumi, AOKI, Takafumi, NAKAJIMA, Hiroshi, KOBAYASHI, Koji, HIGUCHI, Tatsuo

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A Palmprint Recognition Algorithm using Phase-Based Image Matching von Ito, Koichi, Aoki, Takafumi, Nakajima, Hiroshi, Kobayashi, Koji, Higuchi, Tatsuo

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Fast and robust fingerprint identification algorithm and its application to residential access controller von NAKAJIMA, Hiroshi, KOBAYASHI, Koji, MORIKAWA, Makoto, KATSUMATA, Atsushi, ITO, Koichi, AOKI, Takafumi, HIGUCHI, Tatsuo

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Topology-Oriented Design of Analog Circuits Based on Evolutionary Graph Generation von Natsui, Masanori, Homma, Naofumi, Aoki, Takafumi, Higuchi, Tatsuo

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A fingerprint recognition algorithm using phase-based image matching for low-quality fingerprints von Ito, K., Morita, A., Aoki, T., Higuchi, T., Nakajima, H., Kobayashi, K.

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Magnetizing frequency dependence of magnetic domain size in 50% nickel-iron alloy deduced from a statistical analysis of core noise von Higuchi, Tatsuo

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Evolutionary Synthesis of Arithmetic Circuit Structures von Aoki, Takafum, Homma, Naofumi, Higuchi, Tatsuo

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A Fingerprint Recognition Algorithm Combining Phase-Based Image Matching and Feature-Based Matching von Ito, Koichi, Morita, Ayumi, Aoki, Takafumi, Nakajima, Hiroshi, Kobayashi, Koji, Higuchi, Tatsuo

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High-Level Design of Multiple-Valued Arithmetic Circuits Based on Arithmetic Description Language von Watanabe, Y., Homma, N., Degawa, K., Aoki, T., Higuchi, T.

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Minimum round-off noise realizations of separable-denominator two-dimensional digital filters von Kawamata, Masayuki, Higuchi, Tatsuo

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Algorithm-level interpretation of fast adder structures in binary and multiple-valued logic von Homma, N., Aoki, T., Higuchi, T.

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Set-Valued Logic for Multiplex Computing: Toward New-Device-Based Superchips von AOKI, Takafumi, HIGUCHI, Tatsuo

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Analysis of roundoff noise in separable-denominator two-dimensional digital filters von Kawamata, Masayuki, Kawada, Etsuo, Higuchi, Tatsuo

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Multiwave interconnection networks for MCM-based parallel processing von Shionoya, Shinichi, Aoki, Takafumi, Higuchi, Tatsuo

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Retreatment of patients with treatment failure of directacting antivirals: Focus on hepatitis C virus genotype 1b von Tatsuo Kanda Kazushige Nirei Naoki Matsumoto Teruhisa Higuchi Hitomi Nakamura Hiroaki Yamagami Shunichi Matsuoka Mitsuhiko Moriyama

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A single-electron-transistor logic gate family and its application - Part II: design and simulation of a 7-3 parallel counter with linear summation and multiple-valued latch functi... von Inokawa, H., Takahashi, Y.

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Efficient learning of NN-MLP based on individual evolutionary algorithm von Zhao, Qiangfu, Higuchi, Tatsuo

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Separable-denominator two-dimensional adaptive filters with application to noise reduction in images von Kawamata, Masayuki, Kawakami, Eiichiro, Higuchi, Tatsuo

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