The effect of communication and synchronization on Amdahl’s law in multicore systems von Yavits, L., Morad, A., Ginosar, R.

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The Effect of Temperature on Amdahl Law in 3D Multicore Era von Yavits, L., Morad, A., Ginosar, R.

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Fourteen ways to fool your synchronizer von Ginosar, R.

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High Rate Data Synchronization in GALS SoCs von Dobkin, R., Ginosar, R., Sotiriou, C.P.

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A 1.4×FO4 self-clocked asynchronous serial link in 0.18 µm for intrachip communication von Zhang, Y., Dobkin, R., Unikovski, A., Nahmanny, D., Samuel, G., Moyal, M., Ginosar, R.

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Data synchronization issues in GALS SoCs von Dobkin, R., Ginosar, R., Sotiriou, C.P.

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Sparse Matrix Multiplication On An Associative Processor von Yavits, L., Morad, A., Ginosar, R.

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Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders von Dobkin, R., Peleg, M., Ginosar, R.

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Relative timing [asynchronous design] von Stevens, K.S., Ginosar, R., Rotem, S.

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Low-Complexity Policies for Energy-Performance Tradeoff in Chip-Multi-Processors von Elyada, A., Ginosar, R., Weiser, U.

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Asynchronous gate-diffusion-input (GDI) circuits von Morgenshtein, A., Moreinis, M., Ginosar, R.

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A low-power inverted ladder D/a converter von Perelman, Y., Ginosar, R.

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A low-light-level sensor for medical diagnostic applications von Perelman, Y., Ginosar, R.

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Minimal Energy Asynchronous Dynamic Adders von Obridko, I., Ginosar, R.

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Adaptive Cardiac Resynchronization Therapy Device Based on Spiking Neurons Architecture and Reinforcement Learning Scheme von Rom, R., Erel, J., Glikson, M., Lieberman, R.A., Rosenblum, K., Binah, O., Ginosar, R., Hayes, D.L.

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An asynchronous router for multiple service levels networks on chip von Rostislav, D., Vishnyakov, V., Friedman, E., Ginosar, R.

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QNoC: QoS architecture and design process for network on chip von Bolotin, Evgeny, Cidon, Israel, Ginosar, Ran, Kolodny, Avinoam

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A clock-tuning circuit for system-on-chip von Elboim, Y., Kolodny, A., Ginosar, R.

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Efficient Link Capacity and QoS Design for Network-on-Chip von Guz, Z., Walter, I., Bolotin, E., Cidon, I., Ginosar, R., Kolodny, A.

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An asynchronous instruction length decoder von Stevens, K.S., Rotem, S., Ginosar, R., Beerel, P., Myers, C.J., Yun, K.Y., Koi, R., Dike, C., Roncken, M.

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