Low‐voltage and high‐speed stand‐alone multiple‐input complex gates for error correction coding applications von Rafiee, Maliheh, Ghaznavi‐Ghoushchi, Mohammad‐Bagher

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Utilizing signal flow graph on multiple feedback amplifiers of NMC and DACFC with emphasis on design space exploration and conversion von Ghashghai, Masume, Ghaznavi‐Ghoushchi, Mohammad Bagher

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A power‐performance tunable logic with adjustable threshold pseudo‐dynamic building blocks and CMOS compatibility von Ghaffarishad, Hanieh, Mohammadzadeh, Naser, Ghaznavi‐Ghoushchi, Mohammad‐Bagher

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A power–performance partitioning approach for low‐power DA‐based FIR filter design with emphasis on datapath and controller von Ghamkhari, Seyede Fatemeh, Ghaznavi‐Ghoushchi, Mohammad Bagher

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Personalized recommendation of learning material using sequential pattern mining and attribute based collaborative filtering von Salehi, Mojtaba, Nakhai Kamalabadi, Isa, Ghaznavi Ghoushchi, Mohammad Bagher

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A New Low Power Schema for Stream Processors Front-End with Power-Aware DA-Based FIR Filters by Investigation of Image Transitions Sparsity von Ghamkhari, Seyedeh Fatemeh, Ghaznavi-Ghoushchi, Mohammad Bagher

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Low-complexity and differential power analysis (DPA)-resistant two-folded power-aware Rivest–Shamir–Adleman (RSA) security schema implementation for IoT-connected devices von Kaedi, Saman, Doostari, Mohammad Ali, Ghaznavi-Ghoushchi, Mohammad Bagher

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TSSL: improving SSL/TLS protocol by trust model von Asadzadeh Kaljahi, Maryam, Payandeh, Ali, Ghaznavi-Ghoushchi, Mohammad Bagher

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A new secure Internet voting protocol using Java Card 3 technology and Java information flow concept von Mohammadpourfard, Mostafa, Doostari, Mohammad Ali, Ghaznavi Ghoushchi, Mohammad Bagher, Shakiba, Nafiseh

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A fully pipelined and parallel hardware architecture for real-time BRISK salient point extraction von Azimi, Ehsan, Behrad, Alireza, Ghaznavi-Ghoushchi, Mohammad Bagher, Shanbehzadeh, Jamshid

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Two Efficient Dual-Band and Wide-Band Low-Power DCO Designs Using Current Starving Gates, DCV and Reconfigurable Schmitt Triggers in 180 nm von Souri, Masoumeh, Ghaznavi-Ghoushchi, Mohammad Bagher

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Hardware architecture for projective model calculation and false match refining using random sample consensus algorithm von Azimi, Ehsan, Behrad, Alireza, Ghaznavi-Ghoushchi, Mohammad Bagher, Shanbehzadeh, Jamshid

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A New Low-Power Architecture Design for Distributed Arithmetic Unit in FIR Filter Implementation von Ghamkhari, Seyedeh Fatemeh, Ghaznavi-Ghoushchi, Mohammad Bagher

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Workload and temperature dependent evaluation of BTI-induced lifetime degradation in digital circuits von Eghbalkhah, Behzad, Kamal, Mehdi, Afzali-Kusha, Hassan, Afzali-Kusha, Ali, Ghaznavi-Ghoushchi, Mohammad Bagher, Pedram, Massoud

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CSAM: A clock skew-aware aging mitigation technique von Eghbalkhah, Behzad, Kamal, Mehdi, Afzali-Kusha, Ali, Ghaznavi-Ghoushchi, Mohammad Bagher, Pedram, Massoud

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Low-Power Themes Classifier (LPTC): A Human-Expert-Based Approach for Classification of Scientific Papers/Theses with Low-Power Theme von Abasi, Mohsen, Ghaznavi-Ghoushchi, Mohammad Bagher

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A New Recommendation Approach Based on Implicit Attributes of Learning Material von Salehi, Mojtaba, Kmalabadi, Isa Nakhai, Ghoushchi, Mohammad Bagher Ghaznavi

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An ultra low power digitally controlled oscillator with low jitter and high resolution von Majd, Nasser Erfani, Lotfizad, Mojtaba, Abadian, Arash, Ghoushchi, Mohammad Bagher Ghaznavi

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PABEM: A new power-aware adaptive bus encoding method using Huffman algorithm von Hajkazemi, M H, Takapoo, M, Ghaznavi-Ghoushchi, Mohammad Bagher

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A new low-power and low-complexity all digital PLL (ADPLL) in 180nm and 32nm von Abadian, A, Lotfizad, M, Erfani Majd, N, Ghoushchi, Mohammad Bagher Ghaznavi, Mirzaie, H

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