Autonomous dual-mode (PAM2/4) serial link transceiver with adaptive equalization and data recovery von Stojanovic, V., Ho, A., Garlepp, B.W., Chen, F., Wei, J., Tsang, G., Alon, E., Kollipara, R.T., Werner, C.W., Zerbe, J.L., Horowitz, M.A.

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A 12-GS/s Phase-Calibrated CMOS Digital-to-Analog Converter for Backplane Communications von Savoj, J., Abbasfar, A., Amirkhany, A., Jeeradit, M., Garlepp, B.W.

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A Low Area, Switched-Resistor Based Fractional-N Synthesizer Applied to a MEMS-Based Programmable Oscillator von Perrott, M H, Pamarti, S, Hoffman, E G, Lee, F S, Mukherjee, S, Lee, C, Tsinker, V, Perumal, S, Soto, B T, Arumugam, N, Garlepp, B W

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A portable digital DLL for high-speed CMOS interface circuits von Garlepp, B.W., Donnelly, K.S., Jun Kim, Chau, P.S., Zerbe, J.L., Huang, C., Tran, C.V., Portmann, C.L., Stark, D., Yiu-Fai Chan, Lee, T.H., Horowitz, M.A.

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A 2.5-Gb/s multi-rate-0.25-μm CMOS clock and data recovery circuit utilizing a hybrid analog/digital loop filter and all-digital referenceless frequency acquisition von PERROTT, Michael H, YUNTENG HUANG, HEIN, Jerrell, DEL SIGNORE, Bruce, BAIRD, Rex T, GARLEPP, Bruno W, PASTORELLO, Douglas, KING, Eric T, QICHENG YU, KASHA, Dan B, STEINER, Philip, LIGANG ZHANG

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A new technique for characterization of digital-to-analog converters in high-speed systems von Savoj, Jafar, Abbasfar, Ali-Azam, Amirkhany, Amir, Garlepp, Bruno W., Horowitz, Mark A.

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1.6 Gb/s/pin 4-PAM signaling and circuits for a multidrop bus von Zerbe, J.L., Chau, P.S., Werner, C.W., Thrush, T.P., Liaw, H.J., Garlepp, B.W., Donnelly, K.S.

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Integration of Analog Circuits Inside Digital Blocks von Savoj, Jafar, Ahmed, Ramy A, Garlepp, Bruno W

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Integration of analog circuits inside digital blocks von Bruno W Garlepp, Ramy A Ahmed, Jafar Savoj

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RECEIVE OPERATION OF AN ULTRASONIC SENSOR von PERROTT, Michael H, GARLEPP, Bruno W, SALVIA, James Christian

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Integration of analog circuits inside digital blocks von Savoj, Jafar, Ahmed, Ramy A, Garlepp, Bruno W

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INTEGRATION OF ANALOG CIRCUITS INSIDE DIGITAL BLOCKS von Savoj, Jafar, Ahmed, Ramy A, Garlepp, Bruno W

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Margin Test Methods and Circuits von Chen, Fred F, Stojanovic, Vladimir, Garlepp, Bruno W, Ho, Andrew

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DFE margin test methods and circuits that decouple sample feedback timing von Leibowitz, Brian S, Garlepp, Bruno W

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A New Technique for Characterization of Digital-to-Analog Converters in High-Speed Systems von Savoj, J., Ali-Azam Abbasfar, Amirkhany, A., Garlepp, B.W., Horowitz, M.A.

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Sensor interface circuit controller for multiple sensor types in an integrated circuit device von Brandt, II, Robert S, Savoj, Jafar, Garlepp, Bruno W, Yun, Ke, Kumar, Navin

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Integration of analog circuits inside digital blocks von Savoj, Jafar, Ahmed, Ramy A, Garlepp, Bruno W

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Margin test methods and circuits von Chen, Fred F, Stojanovic, Vladimir, Garlepp, Bruno W, Ho, Andrew

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A low-area switched-resistor loop-filter technique for fractional-N synthesizers applied to a MEMS-based programmable oscillator von Perrott, M.H., Pamarti, S., Hoffman, E., Lee, F.S., Mukherjee, S., Lee, C., Tsinker, V., Perumal, S., Soto, B., Arumugam, N., Garlepp, B.W.

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Non-invasive on-chip power measurement technique von Zhang, Weibiao, Garlepp, Bruno W, Yun, Ke, Yee, Gin S

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