Treffer 1 - 13 von 13 für Suche 'GAUGLER ELMAR', Suchdauer: 0,69s Treffer weiter einschränken
  1. 1
    Optimized buffer placement based on timing and capacitance assertions

    Optimized buffer placement based on timing and capacitance assertions von GAUGLER ELMAR, RICHTER RALF, DAELLENBACH LUKAS

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  2. 2
    Method and system for repartitioning a hierarchical circuit design

    Method and system for repartitioning a hierarchical circuit design von GAUGLER ELMAR, HALLER WILHELM, KESSLER FRIEDHELM

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  3. 3
    OPTIMIZED BUFFER PLACEMENT BASED ON TIMING AND CAPACITANCE ASSERTIONS

    OPTIMIZED BUFFER PLACEMENT BASED ON TIMING AND CAPACITANCE ASSERTIONS von GAUGLER ELMAR, RICHTER RALF, DAELLENBACH LUKAS

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  4. 4
    Optimized buffer placement based on timing and capacitance assertions

    Optimized buffer placement based on timing and capacitance assertions von GAUGLER ELMAR, RICHTER RALF, DAELLENBACH LUKAS

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  5. 5
    METHOD AND SYSTEM FOR REPARTITIONING A HIERARCHICAL CIRCUIT DESIGN

    METHOD AND SYSTEM FOR REPARTITIONING A HIERARCHICAL CIRCUIT DESIGN von GAUGLER ELMAR, HALLER WILHELM, KESSLER FRIEDHELM

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  6. 6
    Method and system for repartitioning a hierarchical circuit design

    Method and system for repartitioning a hierarchical circuit design von GAUGLER ELMAR, HALLER WILHELM, KESSLER FRIEDHELM

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  7. 7
    Method and system for placement of electronic circuit components in integrated circuit design

    Method and system for placement of electronic circuit components in integrated circuit design von Gaugler, Elmar, Haller, Wilhelm, Kessler, Friedhelm

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  8. 8
    Method and system for placement of electronic circuit components in integrated circuit design

    Method and system for placement of electronic circuit components in integrated circuit design von GAUGLER ELMAR, HALLER WILHELM, KESSLER FRIEDHELM

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  9. 9
    OPTIMIZED BUFFER PLACEMENT BASED ON TIMING AND CAPACITANCE ASSERTIONS

    OPTIMIZED BUFFER PLACEMENT BASED ON TIMING AND CAPACITANCE ASSERTIONS von GAUGLER ELMAR, RICHTER RALF, DAELLENBACH LUKAS

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  10. 10
    Method and System for Repartitioning a Hierarchical Circuit Design

    Method and System for Repartitioning a Hierarchical Circuit Design von GAUGLER ELMAR, HALLER WILHELM, KESSLER FRIEDHELM

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  11. 11
    Method and System for Placement of Electronic Circuit Components in Integrated Circuit Design

    Method and System for Placement of Electronic Circuit Components in Integrated Circuit Design von GAUGLER ELMAR, HALLER WILHELM, KESSLER FRIEDHELM

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  12. 12
    Early noise detection and noise aware routing in circuit design

    Early noise detection and noise aware routing in circuit design von GAUGLER ELMAR, HALLER WILHELM, RICHTER RALF, DAELLENBACH LUKAS

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  13. 13
    EARLY NOISE DETECTION AND NOISE AWARE ROUTING IN CIRCUIT DESIGN

    EARLY NOISE DETECTION AND NOISE AWARE ROUTING IN CIRCUIT DESIGN von GAUGLER ELMAR, HALLER WILHELM, RICHTER RALF, DAELLENBACH LUKAS

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