CUTBUF: Buffer Management and Router Design for Traffic Mixing in VNET-Based NoCs von Zoni, Davide, Flich, Jose, Fornaciari, William

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Exploiting neural networks bit-level redundancy to mitigate the impact of faults at inference von Catalán, Izan, Flich, José, Hernández, Carles

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Path-Based Partitioning Methods for 3D Networks-on-Chip with Minimal Adaptive Routing von Ebrahimi, Masoumeh, Daneshtalab, Masoud, Liljeberg, Pasi, Plosila, Juha, Flich, Jose, Tenhunen, Hannu

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HPC Platform for Railway Safety-Critical Functionalities Based on Artificial Intelligence von Labayen, Mikel, Medina, Laura, Eizaguirre, Fernando, Flich, José, Aginako, Naiara

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UPR: deadlock-free dynamic network reconfiguration by exploiting channel dependency graph compatibility von Crespo, Juan-José, Sánchez, José L., Alfaro-Cortés, Francisco J., Flich, José, Duato, José

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Enabling dynamic and intelligent workflows for HPC, data analytics, and AI convergence von Ejarque, Jorge, Badia, Rosa M., Albertin, Loïc, Aloisio, Giovanni, Baglione, Enrico, Becerra, Yolanda, Boschert, Stefan, Berlin, Julian R., D’Anca, Alessandro, Elia, Donatello, Exertier, François, Fiore, Sandro, Flich, José, Folch, Arnau, Gibbons, Steven J., Koldunov, Nikolay, Lordan, Francesc, Lorito, Stefano, Løvholt, Finn, Macías, Jorge, Marozzo, Fabrizio, Michelini, Alberto, Monterrubio-Velasco, Marisol, Pienkowska, Marta, de la Puente, Josep, Queralt, Anna, Quintana-Ortí, Enrique S., Rodríguez, Juan E., Romano, Fabrizio, Rossi, Riccardo, Rybicki, Jedrzej, Kupczyk, Miroslaw, Selva, Jacopo, Talia, Domenico, Tonini, Roberto, Trunfio, Paolo, Volpe, Manuela

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Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems von Rodrigo, Samuel, Flich, José, Roca, Antoni, Medardoni, Simone, Bertozzi, Davide, Camacho, Jesús, Silla, Federico, Duato, José

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Region-Based Routing: A Mechanism to Support Efficient Routing Algorithms in NoCs von Mejia, A., Palesi, M., Flich, J., Kumar, S., Lopez, P., Holsmark, R., Duato, J.

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End-Point Congestion Filter for Adaptive Routing with Congestion-Insensitive Performance von Gorgues, Miguel, Flich, Jose

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Guest Editors’ Introduction: Emerging Networks-on-Chip Designs, Technologies, and Applications von Fusella, Edoardo, Nikdast, Mahdi, O'Connor, Ian, Flich, José, Pasricha, Sudeep

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Efficient Routing in Heterogeneous SoC Designs with Small Implementation Overhead von Cano, José, Flich, José, Roca, Antoni, Duato, José, Coppola, Marcello, Locatelli, Riccardo

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Special issue on Communication Architectures for Scalable Systems von Pakin, Scott, Stunkel, Craig

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Runtime home mapping for effective memory resource usage von Lodde, Mario, Flich, José

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Area-efficient snoopy-aware NoC design for high-performance chip multiprocessor systems von Roca, Antoni, Hernandez, Carles, Lodde, Mario, Flich, José

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Silicon-aware distributed switch architecture for on-chip networks von Roca, Antoni, Hernández, Carles, Flich, José, Silla, Federico, Duato, José

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An Efficient and Deadlock-Free Network Reconfiguration Protocol von Lysne, O., Montanana, J.M., Flich, J., Duato, J., Pinkston, T.M., Skeie, T.

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Exploring manycore architectures for next-generation HPC systems through the MANGO approach von Flich, José, Agosta, Giovanni, Ampletzer, Philipp, Alonso, David Atienza, Brandolese, Carlo, Cappe, Etienne, Cilardo, Alessandro, Dragić, Leon, Dray, Alexandre, Duspara, Alen, Fornaciari, William, Fusella, Edoardo, Gagliardi, Mirko, Guillaume, Gerald, Hofman, Daniel, Hoornenborg, Ynse, Iranfar, Arman, Kovač, Mario, Libutti, Simone, Maitre, Bruno, Martínez, José Maria, Massari, Giuseppe, Meinds, Koen, Mlinarić, Hrvoje, Papastefanakis, Ermis, Picornell, Tomás, Piljić, Igor, Pupykina, Anna, Reghenzani, Federico, Staub, Isabelle, Tornero, Rafael, Zanella, Michele, Zapater, Marina, Zoni, Davide

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A Survey and Evaluation of Topology-Agnostic Deterministic Routing Algorithms von Flich, J., Skeie, T., Mejia, A., Lysne, O., Lopez, P., Robles, A., Duato, J., Koibuchi, M., Rokicki, T., Sancho, J. C.

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Built-in fast gather control network for efficient support of coherence protocols von Lodde, Mario, Roca, Toni, Flich, José

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Power Saving by NoC Traffic Compression von Soler, María, Flich, José

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