Optimal Implementation of Tapped Delay Line Time-to-Digital Converters in 20 nm Xilinx UltraScale FPGAs von Morabito, Mattia, Lusardi, Nicola, Garzetti, Fabio, Fiumicelli, Gabriele, Bonanno, Gabriele, Ronconi, Enrico, Costa, Andrea, Geraci, Angelo

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High-Precision Digital-to-Time Converter with High Dynamic Range for 28 nm 7-Series Xilinx FPGA and SoC Devices von Garzetti, Fabio, Lusardi, Nicola, Corna, Nicola, Fiumicelli, Gabriele, Cattaneo, Federico, Bonanno, Gabriele, Costa, Andrea, Ronconi, Enrico, Geraci, Angelo

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