A 2.7 GHz to 7 GHz Fractional-N LC-PLL Utilizing Multi-Metal Layer SoC Technology in 28 nm CMOS von Chang-Hyeon Lee, Kabalican, Lindel, Yan Ge, Kwantono, Hendra, Unruh, Greg, Chambers, Mark, Fujimori, Ichiro

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A 28 Gb/s Multistandard Serial Link Transceiver for Backplane Applications in 28 nm CMOS von Bo Zhang, Khanoyan, Karapet, Hatamkhani, Hamid, Tong, Haitao, Hu, Kangmin, Fallahi, Siavash, Abdul-Latif, Mohammed, Vakilian, Kambiz, Fujimori, Ichiro, Brewster, Anthony

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A 0.5–9.5-GHz, 1.2- \mu \text Lock-Time Fractional-N DPLL With ±1.25%UI Period Jitter in 16-nm CMOS for Dynamic Frequency and Core-Count Scaling von Ahmad, Fazil, Unruh, Greg, Iyer, Amrutha, Pin-En Su, Abdalla, Sherif, Bo Shen, Chambers, Mark, Fujimori, Ichiro

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A 500 mW ADC-Based CMOS AFE With Digital Calibration for 10 Gb/s Serial Links Over KR-Backplane and Multimode Fiber von Jun Cao, Bo Zhang, Singh, Ullas, Cui, Delong, Vasani, Anand, Garg, Adesh, Wei Zhang, Kocaman, Namik, Deyi Pi, Raghavan, Bharath, Hui Pan, Fujimori, Ichiro, Momtaz, Afshin

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A Full-Duplex Line Driver for Gigabit Ethernet With Rail-to-Rail Class-AB Output Stage in 28 nm CMOS von Hui Pan, Yuan Yao, Hammad, Mostafa, Junhua Tan, Abdelhalim, Karim, Wang, Evelyn Wenting, Hsu, Rick C. J., Tam, Derek, Fujimori, Ichiro

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A 90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8× oversampling ratio von Fujimori, I, Longo, L, Hairapetian, A, Seiyama, K, Kosic, S, Cao, Jun, Chan, Shu-Lap

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90-dB SNR 2.5-MHz output-rate ADC using cascaded multibit delta-sigma modulation at 8x oversampling ratio von Fujimori, I, Longo, L, Hairapetian, A, Seiyama, K, Kosic, S, Cao, Jun, Chan, Shu-Lap

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OC-192 transmitter and receiver in standard 0.18-μm CMOS von Cao, J., Green, M., Momtaz, A., Vakilian, K., Chung, D., Keh-Chee Jen, Caresosa, M., Wang, X., Wee-Guan Tan, Yijun Cai, Fujimori, L., Hairapetian, A.

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A multibit delta-sigma audio DAC with 120-dB dynamic range von Fujimori, I., Nogi, A., Sugimoto, T.

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A fully integrated 10-Gb/s receiver with adaptive optical dispersion equalizer in 0.13-μm CMOS von MOMTAZ, Afshin, CHUNG, David, KOCAMAN, Namik, JUN CAO, CARESOSA, Mario, BO ZHANG, FUJIMORI, Ichiro

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8.6 A full-duplex line driver for Gigabit Ethernet with rail-to-rail class-AB output stage in 28nm CMOS von Hui Pan, Yuan Yao, Hammad, Mostafa, Junhua Tan, Abdelhalim, Karim, Wang, Evelyn, Hsu, Rick, Yu, Jenny, Aziz, Joseph, Tam, Derek, Fujimori, Ichiro

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A Fully Integrated 10-Gb/s Receiver With Adaptive Optical Dispersion Equalizer in 0.13- \mu} CMOS von Momtaz, A., Chung, D., Kocaman, N., Jun Cao, Caresosa, M., Bo Zhang, Fujimori, I.

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A fully integrated SONET OC-48 transceiver in standard CMOS von Momtaz, A., Jun Cao, Caresosa, M., Hairapetian, A., Chung, D., Vakilian, K., Green, M., Wee-Guan Tan, Keh-Chee Jen, Fujimori, I., Yijun Cai

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A 1.5 V, 4.1 mW dual-channel audio delta-sigma D/A converter von Fujimori, I., Sugimoto, T.

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A digital wideband CDR with ±15.6kppm frequency tracking at 8Gb/s in 40nm CMOS von Hui Pan, Valliappan, M, Wei Zhang, Vakilian, K, Seong-Ho Lee, Hatamkhani, H, Caresosa, M, Khanoyan, K, Haitao Tong, Tran, D, Brewster, A, Fujimori, I

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A 5-V single-chip delta-sigma audio A/D converter with 111 dB dynamic range von Fujimori, I., Koyama, K., Trager, D., Tam, F., Longo, L.

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System and method to reduce noise in a substrate von FUJIMORI, ICHIRO

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SYSTEM AND METHOD TO REDUCE NOISE IN A SUBSTRATE von FUJIMORI ICHIRO

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System and method to reduce noise in a substrate von FUJIMORI ICHIRO

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System and method to reduce noise in a substrate von Fujimori, Ichiro

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