A Novel Foundry Yield Model Using Critical Area Analysis von Qi, Xiaoyuan, Schroeder, Uwe, Sinnott, Aaron, Nair, Binod Kumar G., Sultan, Akif, Madhavan, Sriram, Condella, Jac, Fales, Jonathan, Nelson, Jeffrey, Gennari, Frank, Lai, Ya-Chieh, Sengupta, Rwik, Hurat, Philippe

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Relative placement by application of layered abstractions von Fales, Jonathan R, Tygert, Joshua David

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Context-aware circuit design layout construct von Sengupta, Rwik, Pylant, Timothy H, Fales, Jonathan R, Tygert, Joshua David

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System and method for device placement von Sengupta, Rwik, Pylant, Timothy H, Fales, Jonathan Robert, Tygert, Joshua David

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Method and system for optimizing migrated implementation of a system design von FALES JONATHAN R

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Method and system for optimizing migrated implementation of a system design von Fales, Jonathan R

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EDA CAA with learning phase von Fales, Jonathan R, Gennari, Frank E, Condella, Jac Paul, Russell, Jeffrey, Nelson, Jeffrey E, Lai, Ya-Chieh

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Test structure and method for detecting and studying crystal lattice dislocation defects in integrated circuit devices von Fales, Jonathan R, Lasky, Jerome B

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Test structure and method for detecting and studying crystal lattice dislocation defects in integrated circuit devices von LASKY JEROME B, FALES JONATHAN R

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System and method for random defect yield simulation of chip with built-in redundancy von Ruehl, Roland, Koshy, Mathew, Fales, Jonathan, Gumaste, Udayan

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System and method for random defect yield simulation of chip with built-in redundancy von KOSHY MATHEW, RUEHL ROLAND, FALES JONATHAN, GUMASTE UDAYAN

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TEST STRUCTURE AND METHOD FOR DETECTING AND STUDYING CRYSTAL LATTICE DISLOCATION DEFECTS IN INTEGRATED CIRCUIT DEVICES von LASKY JEROME B, FALES JONATHAN R

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Maximize acquisition power with municipal leasing programs von Fales, Jonathan

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Efficient circuit and method to measure resistance thresholds von Fales, Jonathan R, Gabric, John A, Karthikeyan, Muthukumarasamy, Oppold, Jeffery H

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Efficient circuit and method to measure resistance thresholds von GABRIC JOHN A, KARTHIKEYAN MUTHUKUMARASAMY, OPPOLD JEFFERY H, FALES JONATHAN R

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SEMICONDUCTOR CIRCUITS CAPABLE OF SELF DETECTING DEFECTS von FALES JONATHAN ROBERT, KARTHIKEYAN MUTHUKUMARASAMY, CASSELS JOHN J, MAFFITT THOMAS MARTIN

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EFFICIENT CIRCUIT AND METHOD TO MEASURE RESISTANCE THRESHOLDS von GABRIC JOHN A, KARTHIKEYAN MUTHUKUMARASAMY, OPPOLD JEFFERY H, FALES JONATHAN R

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Command multiplier for built-in-self-test von FREDEMAN GREGORY J, GORMAN KEVIN W, JACUNSKI MARK D, NORRIS ALAN D, PARRIES PAUL C, KIRIHATA TOSHIAKI, FALES JONATHAN R, WORDEMAN MATTHEW R

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Command multiplier for built-in-self-test von Fales, Jonathan R, Fredeman, Gregory J, Gorman, Kevin W, Jacunski, Mark D, Kirihata, Toshiaki, Norris, Alan D, Parries, Paul C, Wordeman, Matthew R

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A Command Multiplier for Built-In-Self-Test von FREDEMAN GREGORY J, GORMAN KEVIN W, JACUNSKI MARK D, NORRIS ALAN D, PARRIES PAUL C, KIRIHATA TOSHIAKI, FALES JONATHAN R, WORDEMAN MATTHEW R

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