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  1. 1
    Anti-hangup binary quantized DPLL technique for timing recovery in QAM symbol-rate sampled receivers

    Anti-hangup binary quantized DPLL technique for timing recovery in QAM symbol-rate sampled receivers von Panayiotopoulos, I., Doumenis, D.G., Constantinou, P.


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  2. 2
    VLSI implementation of an eight-state clustering based sequence equalizer

    VLSI implementation of an eight-state clustering based sequence equalizer von Georgoulakis, K., Doumenis, D.G., Aggouras, G., Frantzeskakis, E.

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