An Evolutionary Technique for Performance-Energy-Temperature Optimized Scheduling of Parallel Tasks on Multi-Core Processors von Sheikh, Hafiz Fahad, Ahmad, Ishfaq, Fan, Dongrui

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Sampling Methods for Efficient Training of Graph Convolutional Networks: A Survey von Liu, Xin, Yan, Mingyu, Deng, Lei, Li, Guoqi, Ye, Xiaochun, Fan, Dongrui

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A Hierarchical Optical Network-On-Chip Using Central-Controlled Subnet and Wavelength Assignment von Chen, Zheng, Gu, Huaxi, Yang, Yintang, Fan, Dongrui

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A Novel Two-Layer Passive Optical Interconnection Network for On-Chip Communication von Chen, Ke, Gu, Huaxi, Yang, Yintang, Fan, Dongrui

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An efficient dataflow accelerator for scientific applications von Ye, Xiaochun, Tan, Xu, Wu, Meng, Feng, Yujing, Wang, Da, Zhang, Hao, Pei, Songwen, Fan, Dongrui

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On-Chip Generating FPGA Test Configuration Bitstreams to Reduce Manufacturing Test Time von Wang, Fei, Wang, Da, Yang, Haigang, Xie, Xianghui, Fan, Dongrui

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A Comprehensive Survey on Distributed Training of Graph Neural Networks von Lin, Haiyang, Yan, Mingyu, Ye, Xiaochun, Fan, Dongrui, Pan, Shirui, Chen, Wenguang, Xie, Yuan

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Godson-T: An Efficient Many-Core Processor Exploring Thread-Level Parallelism von Fan, Dongrui, Zhang, Hao, Wang, Da, Ye, Xiaochun, Song, Fenglong, Li, Guojie, Sun, Ninghui

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StreamTMC: Stream compilation for tiled multi-core architectures von Wei, Haitao, Qin, Mingkang, Zhang, Weiwei, Yu, Junqing, Fan, Dongrui, Gao, Guang R.

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Characterizing and Understanding GCNs on GPU von Yan, Mingyu, Chen, Zhaodong, Deng, Lei, Ye, Xiaochun, Zhang, Zhimin, Fan, Dongrui, Xie, Yuan

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MoDSE: A High-Accurate Multiobjective Design Space Exploration Framework for CPU Microarchitectures von Wang, Duo, Yan, Mingyu, Teng, Yihan, Han, Dengke, Liu, Xin, Li, Wenming, Ye, Xiaochun, Fan, Dongrui

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Characterizing and Understanding HGNN Training on GPUs von Han, Dengke, Yan, Mingyu, Ye, Xiaochun, Fan, Dongrui

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DropNaE: Alleviating irregularity for large-scale graph representation learning von Liu, Xin, Xiong, Xunbin, Yan, Mingyu, Xue, Runzhen, Pan, Shirui, Pei, Songwen, Deng, Lei, Ye, Xiaochun, Fan, Dongrui

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Multi-Node Acceleration for Large-Scale GCNs von Sun, Gongjian, Yan, Mingyu, Wang, Duo, Li, Han, Li, Wenming, Ye, Xiaochun, Fan, Dongrui, Xie, Yuan

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SimICT: A fast and flexible framework for performance and power evaluation of large-scale architecture von Xiaochun Ye, Dongrui Fan, Ninghui Sun, Shibin Tang, Mingzhe Zhang, Hao Zhang

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An efficient scheduling algorithm for dataflow architecture using loop-pipelining von Li, Yi, Wu, Meng, Ye, Xiaochun, Li, Wenming, Xue, Rui, Wang, Da, Zhang, Hao, Fan, Dongrui

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JBNN: A Hardware Design for Binarized Neural Networks Using Single-Flux-Quantum Circuits von Fu, Rongliang, Huang, Junying, Wu, Haibin, Ye, Xiaochun, Fan, Dongrui, Ho, Tsung-Yi

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HiHGNN: Accelerating HGNNs Through Parallelism and Data Reusability Exploitation von Xue, Runzhen, Han, Dengke, Yan, Mingyu, Zou, Mo, Yang, Xiaocheng, Wang, Duo, Li, Wenming, Tang, Zhimin, Kim, John, Ye, Xiaochun, Fan, Dongrui

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Accelerating Convolutional Neural Networks by Exploiting the Sparsity of Output Activation von Fan, Zhihua, Li, Wenming, Wang, Zhen, Liu, Tianyu, Wu, Haibin, Liu, Yanhuan, Wu, Meng, Wu, Xinxin, Ye, Xiaochun, Fan, Dongrui, Sun, Ninghui, An, Xuejun

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Characterizing and Understanding HGNNs on GPUs von Yan, Mingyu, Zou, Mo, Yang, Xiaocheng, Li, Wenming, Ye, Xiaochun, Fan, Dongrui, Xie, Yuan

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