Super-resolution with selective filter based on adaptive window and variable macro-block size von Quevedo, E., Sánchez, L., M. Callicó, G., Tobajas, F., de la Cruz, J., de Armas, V., Sarmiento, R.

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An Efficient Double-Filter Hardware Architecture for H.264/AVC Deblocking Filtering von Tobajas, Félix, Callicó, Gustavo M., Pérez, Pedro A., de Armas, Valentín, Sarmiento, Roberto

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A gigabit multidrop serial backplane for high-speed digital systems based on asymmetrical power splitter von Esper-Chain, R., Tobajas, F., Tubio, O., Arteaga, R., de Armas, V., Sarmiento, R.

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A Correlational Study of Allied Health Students' Readiness for Inter-Professional Education and Emotional Intelligence in a Selected Local University von De Las Armas, Esmeraldo C

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A CORDIC processor for FFT computation and its implementation using gallium arsenide technology von Sarmiento, R., Tobajas, F., de Armas, V., Esper-Chain, R., Lopez, J.F., Montiel-Nelson, J.A., Nunez, A.

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GMDS: Hardware implementation of novel real output queuing architecture von Arteaga, R., Tobajas, F., Esper-Chain, R., de Armas, V., Sarmiento, R.

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ATM over SDH: design of a STM-16c transceiver using GaAs technology von Tubı́o, O, Esper-Chaı́n, R, González, F, Tobajas, F, de Armas, V, Montiel, J.A, Sarmiento, R

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An Efficient Architecture for Hardware Implementation of H.264/AVC Deblocking Filtering von Tobajas, F., Callico, G., Perez, P.A., De Armas, V., Sarmiento, R.

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Low cost efficient architecture for H.264 motion estimation von Lopez, S., Tobajas, F., Villar, A., de Armas, V., Lopez, J.F., Sarmiento, R.

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Tutoring actions based on learning portfolio for writing assignments in engineering von Tobajas, F., Morales, A., De Armas, V.

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Experimental gigabit multidrop serial backplane for high speed digital systems von Tobajas, F., Esper-Chain, R., Tubio, S., Arteaga, R., de Armas, V., Sarmiento, R.

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Evaluation of a peer Mentoring Program by Mentees after staying three years at the university von Tobajas, F, De Armas, V

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A cell and macrocell compiler for GaAs VLSI full-custom design von Montiel-Nelson, J. A., de Armas, V., Sarmiento, R., Núnez, A.

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Split-engine packet classification: a novel approach to multi-field packet classification on high performance routers with QoS support von Tobajas, F., Canero, V., De Armas, V., Esper-Chain, R., Arteaga, R., Sarmiento, R.

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A cell and macrocell compiler for GaAs VLSI full-custom design von Montiel-Nelson, J.A., de Armas, V., Sarmiento, R., Nunez, A.

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GMDS: hardware implementation of novel real output queuing architecture von Arteaga, R., Tobajas, F., Esper-Chain, R., de Armas, V., Sarmiento, Roberto

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High speed GaAs subsystem design using feed through logic von Montiel-Nelson, J.A., de Armas, V., Sarmiento, R., Nunez, A., Nooshabadi, S.

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Morphological processor for real-time image applications von González, F., Tubı́o, O., Tobajas, F., De Armas, V., Esper-Chaı́n, R., Sarmiento, R.

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OLYMPO: a GaAs compiler for VLSI design von Montiel-Nelson, J.A., de Armas, V., Sarmiento, R., Nunez, A.

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A compact layout technique for reducing switching current effects in high speed circuits von Montiel-Nelson, J.A., de Armas, V., Sarmiento, R., Nunez, A.

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