Performance and Power Comparative Study of Discrete Wavelet Transform on Programmable Processors von Zervas, N. D., Pagkless, G., Dasigenis, M., Soudris, D.

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A single-electron XOR gate von Dasigenis, M.M, Karafyllidis, I, Thanailakis, A

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Data and instruction memory exploration of embedded systems for multimedia applications von Dasigenis, M., Kroupis, N., Argyriou, A., Tatas, K., Soudris, D., Zervas, N.

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Memory hierarchy optimization of multimedia applications on programmable embedded cores von Tatas, K., Argyriou, A., Dasigenis, M., Soudris, D., Zervas, N.

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A memory management approach for efficient implementation of multimedia kernels on programmable architectures von Dasigenis, M., Kroupis, N., Argyriou, A., Tatas, K., Soudris, D., Thanailakis, A., Zervas, N.

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Power, performance and area exploration of block matching algorithms mapped on programmable processors von Kroupis, N., Dasigenis, M., Argyriou, A., Tatas, K., Soudris, D., Thanailakis, A., Zervas, N., Goutis, C.E.

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Designing RNS and QRNS full adder based converters von Soudris, D.J., Dasigenis, M.M., Thanailakis, A.T.

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A CAD tool for architecture level exploration and automatic generation of RNS converters von Soudris, D.J., Dasigenis, M.M., Vasilopoulou, S.K., Thanailakis, A.T.

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