Parallel Metropolis coupled Markov chain Monte Carlo for Bayesian phylogenetic inference von Altekar, Gautam, Dwarkadas, Sandhya, Huelsenbeck, John P., Ronquist, Fredrik

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Languages, Compilers, and Run-Time Systems for Scalable Computers: 5th International Workshop, LCR 2000 Rochester, NY, USA, May 25-27, 2000 Selected Papers von Dwarkadas, Sandhya

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Preventing Coherence State Side Channel Leaks Using TimeCache von Ojha, Divya, Dwarkadas, Sandhya

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Top Picks in Computer Architecture from Conferences in 2018 von Dwarkadas, Sandhya

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2018 Maurice Wilkes Award Given to Gabriel Loh von Dwarkadas, Sandhya

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Hierarchical parallelization of gene differential association analysis von Needham, Mark, Hu, Rui, Dwarkadas, Sandhya, Qiu, Xing

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Amoeba-Cache: Adaptive Blocks for Eliminating Waste in the Memory Hierarchy von Kumar, S., Hongzhou Zhao, Shriraman, A., Matthews, E., Dwarkadas, S., Shannon, L.

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Characterizing and predicting program behavior and its variability von Duesterwald, E., Cascaval, C., Sandhya Dwarkadas

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The Impact of Page Size and Microarchitecture on Instruction Address Translation Overhead von Zhou, Yufeng, Cox, Alan L., Dwarkadas, Sandhya, Dong, Xiaowan

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MAPPER: Managing Application Performance via Parallel Efficiency Regulation von Srikanthan, Sharanyan, Chakraborti, Sayak, Ferro, Princeton, Dwarkadas, Sandhya

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An Application-Tailored Approach to Hardware Cache Coherence : Toward a Coherent Multicore Memory Model von SHRIRAMAN, Arrvindh, HONGZHOU ZHAO, DWARKADAS, Sandhya

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RollingCache: Using Runtime Behavior to Defend Against Cache Side Channel Attacks von Ojha, Divya, Dwarkadas, Sandhya

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An Application-Tailored Approach to Hardware Cache Coherence von Shriraman, Arrvindh, Hongzhou Zhao, Dwarkadas, Sandhya

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Analyzing Conflicts in Hardware-Supported Memory Transactions von Shriraman, Arrvindh, Dwarkadas, Sandhya

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The Grad Cohort Workshop: Evaluating an Intervention to Retain Women Graduate Students in Computing von Stout, Jane G, Tamer, Burçin, Wright, Heather M, Clarke, Lori A, Dwarkadas, Sandhya, Howard, Ayanna M

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Flexible Decoupled Transactional Memory Support von Shriraman, Arrvindh, Dwarkadas, Sandhya, Scott, Michael L.

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SPATL: Honey, I Shrunk the Coherence Directory von Hongzhou Zhao, Shriraman, A., Dwarkadas, S., Srinivasan, V.

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Timing Cache Accesses to Eliminate Side Channels in Shared Software von Ojha, Divya, Dwarkadas, Sandhya

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Introduction to the Special Issue on PPoPP’14

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Implementation tradeoffs in the design of flexible transactional memory support von Shriraman, Arrvindh, Dwarkadas, Sandhya, Scott, Michael L.

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