Accelerating Weather Prediction Using Near-Memory Reconfigurable Fabric von Singh, Gagandeep, Diamantopoulos, Dionysios, Gómez-Luna, Juan, Hagleitner, Christoph, Stuijk, Sander, Corporaal, Henk, Mutlu, Onur

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FPGA-Based Near-Memory Acceleration of Modern Data-Intensive Applications von Singh, Gagandeep, Alser, Mohammed, Cali, Damla Senol, Diamantopoulos, Dionysios, Gomez-Luna, Juan, Corporaal, Henk, Mutlu, Onur

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Dynamic Optimization of On-Chip Memories for HLS Targeting Many-Accelerator Platforms von Kokkinis, Argyris, Diamantopoulos, Dionysios, Siozios, Kostas

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A Systematic Methodology for Reliability Improvements on SoC-Based Software Defined Radio Systems von Diamantopoulos, Dionysios, Siozios, Kostas, Xydis, Sotiris, Soudris, Dimitrios

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WFA-FPGA: An efficient accelerator of the wavefront algorithm for short and long read genomics alignment von Haghi, Abbas, Marco-Sola, Santiago, Alvarez, Lluc, Diamantopoulos, Dionysios, Hagleitner, Christoph, Moreto, Miquel

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Advancing Compilation of DNNs for FPGAs Using Operation Set Architectures von Ringlein, Burkhard, Abel, Francois, Diamantopoulos, Dionysios, Weiss, Beat, Hagleitner, Christoph, Fey, Dietmar

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Exploiting HBM on FPGAs for Data Processing von Shi, Runbin, Kara, Kaan, Hagleitner, Christoph, Diamantopoulos, Dionysios, Syrivelis, Dimitris, Alonso, Gustavo

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An FPGA-based Integrated MapReduce Accelerator Platform von Kachris, Christoforos, Diamantopoulos, Dionysios, Sirakoulis, Georgios Ch, Soudris, Dimitrios

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Low Precision Processing for High Order Stencil Computations von Singh, Gagandeep, Diamantopoulos, Dionysios, Stuijk, Sander, Hagleitner, Christoph, Corporaal, Henk

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SPARTAN: Developing a Vision System for Future Autonomous Space Exploration Robots von Kostavelis, Ioannis, Nalpantidis, Lazaros, Boukas, Evangelos, Rodrigalvarez, Marcos Aviles, Stamoulias, Ioannis, Lentaris, George, Diamantopoulos, Dionysios, Siozios, Kostas, Soudris, Dimitrios, Gasteratos, Antonios

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Mitigating Memory-Induced Dark Silicon in Many-Accelerator Architectures von Diamantopoulos, Dionysios, Xydis, Sotirios, Siozios, Kostas, Soudris, Dimitrios

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GENESIS: Parallel Application Placement onto Reconfigurable Architectures (Invited for the Special Issue on Runtime Management) von Diamantopoulos, Dionysios, Siozios, Kostas, Xydis, Sotirios, Soudris, Dimitrios

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Plug&Chip: A Framework for Supporting Rapid Prototyping of 3D Hybrid Virtual SoCs von Diamantopoulos, Dionysios, Sotiriou-Xanthopoulos, Efstathios, Siozios, Kostas, Economakos, George, Soudris, Dimitrios

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A framework for rapid evaluation of heterogeneous 3-D NoC architectures von Sotiriou-Xanthopoulos, Efstathios, Diamantopoulos, Dionysios, Siozios, Kostas, Economakos, George, Soudris, Dimitrios

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Evaluation of High-Level Synthesis Techniques for Memory and Datapath Tradeoffs in FPGA Based SoC Architectures von Sotiriou-Xanthopoulos, Efstathios, Diamantopoulos, Dionysios, Economakos, George

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Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator Architectures von Diamantopoulos, Dionysios, Xydis, S., Siozios, K., Soudris, D.

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WannaLaugh: A Configurable Ransomware Emulator -- Learning to Mimic Malicious Storage Traces von Diamantopoulos, Dionysios, Pletka, Roman, Sarafijanovic, Slavisa, Reddy, A. L. Narasimha, Pozidis, Haris

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Deep neural network on field-programmable gate array von Diamantopoulos, Dionysios, Polig, Raphael, Purandare, Mitra

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Optimizing container executions with network-attached hardware components of a composable disaggregated infrastructure von Ringlein, Burkhard, Diamantopoulos, Dionysios, Abel, Francois

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Artificial neural network implementation in field-programmable gate arrays von Hagleitner, Christoph, Diamantopoulos, Dionysios, Giefers, Heiner

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