Formal description model and conditions for detecting linked coupling faults of the memory devices von Yarmolik, V. N., Demenkovets, D. V., Petrovskaya, V. V., Ivaniuk, A. A.

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Generation of address sequences with specified switching activity and address repeatability von Yarmolik, V. N., Shevchenko, N. A., Levantsevich, V. А., Demenkovets, D. V.

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Transparent memory tests with even repeating addresses for storage devices von Yarmolik, V. N., Mrozek, I. M., Levantsevich, V. A., Demenkovets, D. V.

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Transparent memory testing based on dual address sequences von Yarmolik, V. N., Mrozek, I., Levantsevich, V. A., Demenkovets, D. V.

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Construction and application of march tests for pattern sensitive memory faults detection von Yarmolik, V. N., Levantsevich, V. A., Demenkovets, D. V., Mrozek, I.

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Analysis and Synthesis March Memory Tests von V. N. Yarmolik, V. A. Levantsevich, D. V. Demenkovets

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Analysis and Synthesis March Memory Tests von V. N. Yarmolik, V. A. Levantsevich, D. V. Demenkovets

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Assessment of the Technical Objects State by the Parameters of the Vibration Signal von P. J. Brancevich, N. V. Lapitskaya, V. A. Levantsevich, D. V. Demenkovets

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Assessment of the Technical Objects State by the Parameters of the Vibration Signal von P. J. Brancevich, N. V. Lapitskaya, V. A. Levantsevich, D. V. Demenkovets

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