Simulating the impact of pattern-dependent poly-CD variation on circuit performance von Stine, B.E., Boning, D.S., Chung, J.E., Ciplickas, D.J., Kibarian, J.K.

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Predictive yield modeling for reconfigurable memory circuits von Ciplickas, D.J., Li, X., Vallishayee, R., Strojwas, A., Williams, R., Renfro, M., Nurani, R.

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Automated load-independent cell library macromodeling for efficient and accurate waveform simulation von Ciplickas, D.J., Rohrer, R.A.

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Predictive yield modeling of VLSIC's von Ciplickas, D.J., Xiaolei Li, Strojwas, A.J.

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Expected current distributions for CMOS circuits von Ciplickas, D.J., Rohrer, R.A.

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A simulation methodology for assessing the impact of spatial/pattern dependent interconnect parameter variation on circuit performance von Stine, B.E., Mehrotra, V., Boning, D.S., Chung, J.E., Ciplickas, D.J.

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