Multiple-Wearable-Sensor-Based Gait Classification and Analysis in Patients with Neurological Disorders von Hsu, Wei-Chun, Sugiarto, Tommy, Lin, Yi-Jia, Yang, Fu-Chi, Lin, Zheng-Yi, Sun, Chi-Tien, Hsu, Chun-Lung, Chou, Kuan-Nien

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Machine Learning-Based Detection Method for Wafer Test Induced Defects von Cheng, Ken Chau-Cheung, Chen, Leon Li-Yang, Li, Ji-Wei, Li, Katherine Shu-Min, Tsai, Nova Cheng-Yen, Wang, Sying-Jyan, Huang, Andrew Yi-Ann, Chou, Leon, Lee, Chen-Shiun, Chen, Jwu E., Liang, Hsing-Chung, Hsu, Chun-Lung

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Wafer Defect Pattern Labeling and Recognition Using Semi-Supervised Learning von Li, Katherine Shu-Min, Jiang, Xu-Hao, Chen, Leon Li-Yang, Wang, Sying-Jyan, Huang, Andrew Yi-Ann, Chen, Jwu E., Liang, Hsing-Chung, Hsu, Chun-Lung

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Built-in Self-Test Design for Fault Detection and Fault Diagnosis in SRAM-Based FPGA von Hsu, C.-L., Chen, T.-H.

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Fault-Aware Dependability Enhancement Techniques for Flash Memories von Lu, Shyue-Kung, Yu, Shu-Chi, Hsu, Chun-Lung, Sun, Chi-Tien, Hashizume, Masaki, Yotsuyanagi, Hiroyuki

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Surface EMG vs. High-Density EMG: Tradeoff Between Performance and Usability for Head Orientation Prediction in VR Application von Sugiarto, Tommy, Hsu, Chun-Lung, Sun, Chi-Tien, Hsu, Wei-Chun, Ye, Shu-Hao, Lu, Kuan-Ting

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Fault-Aware Dependability Enhancement Techniques for Phase Change Memory von Lu, Shyue-Kung, Li, Hui-Ping, Miyase, Kohei, Hsu, Chun-Lung, Sun, Chi-Tien

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Retention-Aware Refresh Techniques for Reducing Power and Mitigation of Data Retention Faults in DRAM von Lu, Shyue-Kung, Huang, Hung-Kai, Hsu, Chun-Lung, Sun, Chi-Tien, Miyase, Kohei

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Low-Cost CP-PLL DFT Structure Implementation for Digital Testing Application von Hsu, C.-L., Lai, Y.-T.

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Testing of in-memory-computing memories with 8 T SRAMs von Tsai, Tsai-Ling, Li, Jin-Fu, Hsu, Chun-Lung, Sun, Chi-Tien

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Built-in self-test for phase-locked loops von Hsu, C.-L., Lai, Y., Wang, S.-W.

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Design of an Error-Tolerance Scheme for Discrete Wavelet Transform in JPEG 2000 Encoder von Hsu, Chun-Lung, Huang, Yu-Sheng, Chang, Ming-Da, Huang, Hung-Yen

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Design of an Error Detection and Data Recovery Architecture for Motion Estimation Testing Applications von CHENG, Chang-Hsin, YU LIU, HSU, Chun-Lung

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Interlaced switch boxes placement for three-dimensional FPGA architecture design von Hsu, Chun-Lung, Huang, Yu-Sheng, Lee, Fong-Chao

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Built-in Self-Detection/Correction Architecture for Motion Estimation Computing Arrays von HSU, Chun-Lung, CHENG, Chang-Hsin, YU LIU

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Novel Built-In Current-Sensor-Based [Formula Omitted] Testing Scheme for CMOS Integrated Circuits von Chun-Lung Hsu, Chun-Lung Hsu, Mean-Hom Ho, Mean-Hom Ho, Chih-Feng Lin, Chih-Feng Lin

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A Fast-Deblocking Boundary-strength Based Architecture Design of Deblocking Filter in H.264/AVC Applications von Hsu, Chun-Lung, Huang, Yu-Sheng

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A Strategy for Interconnect Testing in Stacked Mesh Network-on-Chip von Min-Ju Chan, Chun-Lung Hsu

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Built-In Self-Test Design for the 3D-Stacked Wide-I/O DRAM von Luo, Kun-Lun, Wu, Ming-Hsueh, Hsu, Chun-Lung, Chen, Chen-An

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Adaptive De-noising Filter Algorithm for CMOS Image Sensor Testing Applications von Chun-Lung Hsu, Chen-Wei Lan, Yu-Chih Lo, Yu-Sheng Huang

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