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Flip chip power cycling system development and lead free bump power cycling reliability von Wu, M. K. C., Pan, H. Y., Lin, L., Chiu, C., Chou, T., Lu, G., Liu, P., Wu, G., Pu, H. P., Tsai, H. Y., Kiang, B., Wu, K., Lii, M. J., Yu, C. H.

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Second-level interconnects reliability for large-die flip chip lead-free BGA package in power cycling and thermal cycling tests von Lin, L., Yu-Ling Tsai, Chou, T., Su, R., Lu, G., Wu, M. K. C., Pan, H. Y., Pu, H. P., Hsieh, R., Wu, K.

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