High Performance Low Power Pulse-Clocked TMR Circuits for Soft-Error Hardness von Ramamurthy, Chandarasekaran, Chellappa, Srivatsan, Vashishtha, Vinay, Gogulamudi, Anudeep, Clark, Lawrence T.

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A Dynamic Longest Prefix Matching Content Addressable Memory for IP Routing von Maurya, S K, Clark, L T

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Area-Efficient Temporally Hardened by Design Flip-Flop Circuits von Matush, Bradley I, Mozdzen, Thomas John, Clark, Lawrence T, Knudsen, Jonathan E

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SRAM-Based Unique Chip Identifier Techniques von Chellappa, Srivatsan, Clark, Lawrence T.

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Itemization and Track Limitations of Fan-Out-Free Functions for Static CMOS Functional Cells von Brunhaver, John, Uhrie, Richard, Clark, Lawrence T.

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Physically Based Predictive Model for Single Event Transients in CMOS Gates von Saremi, Mehdi, Privat, Aymeric, Barnaby, Hugh J., Clark, Lawrence T.

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SRAM Circuits for True Random Number Generation Using Intrinsic Bit Instability von Clark, Lawrence T., Medapuram, Sai Bharadwaj, Kadiyala, Divya Kiran

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A Soft-Error Hardened by Design Microprocessor Implemented on Bulk 12-nm FinFET CMOS von Clark, Lawrence T., Duvnjak, Alen, Cannon, Matthew, Brunhaver, John, Agarwal, Sapan, Manuel, Jack E., Wilson, Donald, Barnaby, Hugh, Marinella, Matthew

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Physically Unclonable Functions Using Foundry SRAM Cells von Clark, Lawrence T., Medapuram, Sai Bharadwaj, Kadiyala, Divya Kiran, Brunhaver, John

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Measuring and Modeling Single Event Transients in 12-nm Inverters von Agarwal, Sapan, Clark, Lawrence T., Youngsciortino, Clifford, Ng, Garrick, Black, Dolores, Cannon, Matthew, Black, Jeffrey, Quinn, Heather, Brunhaver, John, Barnaby, Hugh, Manuel, Jack, Blansett, Ethan, Marinella, Matthew J.

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Total Ionizing Dose Response of a 22-nm Compiled Fully-Depleted-Silicon-on-Insulator Static Random Access Memory von Clark, Lawrence T., Brown, William E., Holbert, Keith E., Rao, A., Bikkina, P., Turowski, Marek, Levy, Andrew, Olvarez, T., Butler, Jim D., YoungSciortino, Clifford, Guertin, Steven M.

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Multiscale System Modeling of Single-Event-Induced Faults in Advanced Node Processors von Cannon, Matthew, Rodrigues, Arun, Black, Dolores, Black, Jeff, Bustamante, Luis, Breeding, Matthew, Feinberg, Ben, Skoufis, Micahel, Quinn, Heather, Clark, Lawrence T., Brunhaver, John, Barnaby, Hugh, McLain, Michael, Agarwal, Sapan, Marinella, Matthew J.

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Total Ionizing Dose Impact on 22-nm FD-SOI Ring Oscillator Current and Frequency von Clark, Lawrence T., Brown, William E., Young-Sciortino, Clifford S., Butler, Jim D., Guertin, Steven M., Holbert, Keith E., Bikkina, Phaneendra, Bhanushali, Sumukh, Turowski, Marek, Levy, Andrew

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An Embedded Microprocessor Radiation Hardened by Microarchitecture and Circuits von Clark, Lawrence T., Patterson, Dan W., Ramamurthy, Chandarasekaran, Holbert, Keith E.

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Circuit Simulation Based Validation of Flip-Flop Robustness to Multiple Node Charge Collection von Shambhulingaiah, Sandeep, Lieb, Christopher, Clark, Lawrence T.

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Reliable techniques for integrated circuit identification and true random number generation using 1.5-transistor flash memory von Clark, Lawrence T., Adams, James, Holbert, Keith E.

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A Soft-Error Mitigated Microprocessor With Software Controlled Error Reporting and Recovery von Farnsworth, Chad, Clark, Lawrence T., Gogulamudi, Anudeep R., Vashishtha, Vinay, Gujja, Aditya

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Reducing Transistor Variability for High Performance Low Power Chips von Rogenmoser, R., Clark, L. T.

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A 90-nm Radiation Hardened Clock Spine von Chellappa, Srivatsan, Clark, Lawrence T., Holbert, Keith E.

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Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response von Clark, Lawrence T., Holbert, Keith E., Adams, James W., Navale, Harshad, Anderson, Blake C.

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