Kinetic Velocity Model to Account for Ballistic Effects in the Drift-Diffusion Transport Approach von Penzin, Oleg, Smith, Lee, Erlebach, Axel, Munkang Choi, Ko-Hsin Lee

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Comparative Analysis of Semiconductor Device Architectures for 5-nm Node and Beyond von Peijie Feng, Seung-Chul Song, Nallapati, Giri, Zhu, John, Bao, Jerry, Moroz, Victor, Munkang Choi, Xi-Wei Lin, Qiang Lu, Colombeau, Benjamin, Breil, Nicolas, Chudzik, Michael, Chidambaram, Chidi

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Effectiveness of Stressors in Aggressively Scaled FinFETs von Nuo Xu, Ho, B., Munkang Choi, Moroz, V., Liu, Tsu-Jae King

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Impact on circuit performance of deterministic within-die variation in nanoscale semiconductor manufacturing von Munkang Choi, Milor, L.

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Diagnosis of Optical Lithography Faults With Product Test Sets von Munkang Choi, Milor, L.

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(Invited) Impact of Stress and Defects on Advanced Junction Leakage von Moroz, Victor, Choi, Munkang

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A 3-D TCAD Framework for NBTI-Part I: Implementation Details and FinFET Channel Material Impact von Tiwari, Ravi, Parihar, Narendra, Thakor, Karansingh, Wong, Hiu Yung, Motzny, Steve, Choi, Munkang, Moroz, Victor, Mahapatra, Souvik

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Intentional Distortion of Transistor Shape to Improve Circuit Performance von Moroz, V., Munkang Choi, Xi-Wei Lin

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A 3-D TCAD Framework for NBTI, Part-II: Impact of Mechanical Strain, Quantum Effects, and FinFET Dimension Scaling von Tiwari, Ravi, Parihar, Narendra, Thakor, Karansingh, Wong, Hiu Yung, Motzny, Steve, Choi, Munkang, Moroz, Victor, Mahapatra, Souvik

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(Invited) Modeling Extended Defects in Semiconductor Devices von Moroz, Victor, Wong, Hiu Yung, Choi, Munkang

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The Impact of Defects on GaN Device Behavior: Modeling Dislocations, Traps, and Pits von Moroz, Victor, Wong, Hiu Yung, Choi, Munkang, Braga, Nelson, Mickevicius, R. V., Zhang, Yuhao, Palacios, Thomas

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Study of Area Scaling Effect on Integrated Circuit Reliability Based on Yield Models von Hong, Changsoo, Milor, Linda, Choi, Munkang, Lin, Tom

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Effectiveness of strained-Si technology for thin-body MOSFETs von Nuo Xu, Changhwan Shin, Andrieu, F., Ho, B., Wade Xiong, Weber, O., Poiroux, T., Bich-Yen Nguyen, Munkang Choi, Moroz, V., Faynot, O., Tsu-Jae King Liu

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(Invited) Strain Scaling and Modeling for FETs von Moroz, Victor, Choi, Munkang

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(Invited) Material Engineering for 7nm FinFETs von Moroz, Victor, Huang, Joanne, Choi, Munkang, Smith, Lee

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Exploring doping options and variability of trigate transistors using atomistic process and device simulations von Martin-Bragado, Ignacio, Moroz, Victor, Choi, Munkang

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14 nm FinFET Stress Engineering with Epitaxial SiGe Source/Drain von Munkang Choi, Moroz, V., Smith, L., Penzin, O.

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(Invited) Material Engineering for the GAA and Post-GAA Transistors and Interconnects von Moroz, Victor, Smidstrup, Soren, Choi, Munkang, Gull, Ronald, Aboud, Shela

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INPUT/OUTPUT DEVICES THAT ARE COMPATIBLE WITH GATE-ALL-AROUND TECHNOLOGY von MOROZ, Victor, LEFFERTS, Robert B, LIN, Xi-Wei, CHOI, Munkang

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Is strain engineering scalable in FinFET era?: Teaching the old dog some new tricks von Nainani, A., Gupta, S., Moroz, V., Munkang Choi, Yihwan Kim, Cho, Y., Gelatos, J., Mandekar, T., Brand, A., Er-Xuan Ping, Abraham, M. C., Schuegraf, K.

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