Treffer 1 - 11 von 11 für Suche 'CHO, Kyungseon', Suchdauer: 0,48s Treffer weiter einschränken
  1. 1
    Energy-Efficient Hybrid Spin-CMOS Logic Design based on Cascadable Spin-Torque Majority Gate

    Energy-Efficient Hybrid Spin-CMOS Logic Design based on Cascadable Spin-Torque Majority Gate von Cho, Kyungseon, Seo, Yeongkyo

    Veröffentlicht in IEEE transactions on magnetics

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  2. 2
    STT-MRAM-Based Multicontext FPGA for Multithreading Computing Environment

    STT-MRAM-Based Multicontext FPGA for Multithreading Computing Environment von Kim, Jeongbin, Song, Yongwoon, Cho, Kyungseon, Lee, Hyukjun, Yoon, Hongil, Chung, Eui-Young


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  3. 3
    Identification of Novel Resorcinol Amide Derivatives as Potent and Specific Pyruvate Dehydrogenase Kinase (PDHK) Inhibitors

    Identification of Novel Resorcinol Amide Derivatives as Potent and Specific Pyruvate Dehydrogenase Kinase (PDHK) Inhibitors von Cho, Hanna, Shin, Injae, Cho, Kyungseon, Yoon, Hojong, Yoo, Eun Kyung, Kim, Mi-Jin, Park, Sungmi, Lee, In-Kyu, Kim, Nam Doo, Sim, Taebo

    Veröffentlicht in Journal of medicinal chemistry

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  4. 4
    CMOS Automation Framework for Digital Circuit Design and Verification

    CMOS Automation Framework for Digital Circuit Design and Verification von YEONGKYO SEO, BONG HAYUN, KYUNGSEON CHO

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  5. 5
    Method for designing an FPGA

    Method for designing an FPGA von Cho, Daehyung, Chung, Eui-Young, Kim, Jeongbin, Kim, Kitae, Lee, Seungjin, Yoon, Hongil, Cho, Kyungseon

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  6. 6
    METHOD FOR DESIGNING AN FPGA

    METHOD FOR DESIGNING AN FPGA von LEE, Seungjin, CHUNG, Eui-Young, CHO, Kyungseon, CHO, Daehyung, YOON, Hongil, KIM, Jeongbin, KIM, Kitae

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  7. 7
    Look up table including a nonvolatile memory element, FPGA including the look up table, and method for designing the FPGA

    Look up table including a nonvolatile memory element, FPGA including the look up table, and method for designing the FPGA von Cho, Daehyung, Chung, Eui-Young, Kim, Jeongbin, Kim, Kitae, Lee, Seungjin, Yoon, Hongil, Cho, Kyungseon

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  8. 8
    LOOK UP TABLE INCLUDING A NONVOLATILE MEMORY ELEMENT, FPGA INCLUDING THE LOOK UP TABLE, AND METHOD FOR DESIGNING THE FPGA

    LOOK UP TABLE INCLUDING A NONVOLATILE MEMORY ELEMENT, FPGA INCLUDING THE LOOK UP TABLE, AND METHOD FOR DESIGNING THE FPGA von Cho, Daehyung, Chung, Eui-Young, Kim, Jeongbin, Kim, Kitae, Lee, Seungjin, Yoon, Hongil, Cho, Kyungseon

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  9. 9
    Combination of adaptive multiuser detection and parallel interference cancellation technique for DS-CDMA systems

    Combination of adaptive multiuser detection and parallel interference cancellation technique for DS-CDMA systems von KyungSeon Cho, Madsen, A.H., WonJin Park

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  10. 10
    LUT LUT FPGA FPGA LOOK UP TABLE INCLUDING NONVOLATILE MEMORY ELEMENT FPGA INCLUDING THE LOOK UP TABLE AND METHOD FOR DESIGNING THE FPGA

    LUT LUT FPGA FPGA LOOK UP TABLE INCLUDING NONVOLATILE MEMORY ELEMENT FPGA INCLUDING THE LOOK UP TABLE AND METHOD FOR DESIGNING THE FPGA von KITAE KIM, SEUNGJIN LEE, CHUNG, EUI YOUNG, DAEHYUNG CHO, KYUNGSEON CHO, YOON, HONG IL, JEONGBIN KIM

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  11. 11
    DISPLAY APPARATUS

    DISPLAY APPARATUS von Shim, Yiseop, Cho, Kyuwon, Tak, Kyungseon, Jang, Hyelim, Park, Yunhee, Lee, Hyunseung

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