Efficient and Composable Masked AES S-Box Designs Using Optimized Inverters von Hadžic, Vedad, Bloem, Roderick

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Handbook of Model Checking von Clarke, Edmund M, Henzinger, Thomas A, Veith, Helmut, Bloem, Roderick

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Online shielding for reinforcement learning von Könighofer, Bettina, Rudolf, Julian, Palmisano, Alexander, Tappler, Martin, Bloem, Roderick

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Specifiable robustness in reactive synthesis von Bloem, Roderick, Chockler, Hana, Ebrahimi, Masoud, Strichman, Ofer

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Closing the Gap: Leakage Contracts for Processors with Transitions and Glitches von Haring, Johannes, Hadži´c, Vedad, Bloem, Roderick

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Vacuity in synthesis von Bloem, Roderick, Chockler, Hana, Ebrahimi, Masoud, Strichman, Ofer

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Preface for the SYNT von Bloem, Roderick, Tabuada, Paulo

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Proving SIFA protection of masked redundant circuits von Hadžić, Vedad, Primas, Robert, Bloem, Roderick

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Better Quality in Synthesis through Quantitative Objectives von Bloem, Roderick, Chatterjee, Krishnendu, Henzinger, Thomas A., Jobstmann, Barbara

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Software Verification: 13th International Conference, VSTTE 2021, New Haven, CT, USA, October 18-19, 2021, and 14th International Workshop, NSV 2021, Los Angeles, CA, USA, July 18-... von Bloem, Roderick, Dimitrova, Rayna, Fan, Chuchu, Sharygina, Natasha

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Generic Low-Latency Masking in Hardware von Hannes Gross, Rinat Iusupov, Roderick Bloem

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Two SAT solvers for solving quantified Boolean formulas with an arbitrary number of quantifier alternations von Bloem, Roderick, Braud-Santoni, Nicolas, Hadzic, Vedad, Egly, Uwe, Lonsing, Florian, Seidl, Martina

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Quantile: Quantifying Information Leakage von Hadžic, Vedad, Cassiers, Gaëtan, Primas, Robert, Mangar, Stefan, Bloem, Roderick

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Parameterized Synthesis von Jacobs, Swen, Bloem, Roderick

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The Reactive Synthesis Competition: SYNTCOMP 2016 and Beyond von Jacobs, Swen, Bloem, Roderick

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Hardware and Software: Verification and Testing: 12th International Haifa Verification Conference, HVC 2016, Haifa, Israel, November 14-17, 2016, Proceedings

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Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults von Tollec, Simon, Hadži´c, Vedad, Nasahl, Pascal, Asavoae, Mihail, Bloem, Roderick, Couroussé, Damien, Heydemann, Karine, Jan, Mathieu, Mangard, Stefan

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Hardware and Software: Verification and Testing : 12th International Haifa Verification Conference, HVC 2016, Haifa, Israel, November 14-17, 2016, Proceedings von Bloem, Roderick, Arbel, Eli

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How to Handle Assumptions in Synthesis von Bloem, Roderick, Ehlers, Rüdiger, Jacobs, Swen, Könighofer, Robert

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CTL synthesis via LTL synthesis von Bloem, Roderick, Schewe, Sven, Khalimov, Ayrat

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