Bypassing Multicore Memory Bugs With Coarse-Grained Reconfigurable Logic von Lee, Doowon, Bertacco, Valeria

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Optimizing Vertex Pressure Dynamic Graph Partitioning in Many-Core Systems von McCrabb, Andrew, Bertacco, Valeria

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Collaborative Accelerators for Streamlining MapReduce on Scale-up Machines With Incremental Data Aggregation von Addisie, Abraham, Bertacco, Valeria

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Hardware and Software: Verification and Testing : 9th International Haifa Verification Conference, HVC 2013, Haifa, Israel, November 5-7, 2013, Proceedings von Bertacco, Valeria, Legay, Axel

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Resource Conscious Diagnosis and Reconfiguration for NoC Permanent Faults von Parikh, Ritesh, Bertacco, Valeria

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At-Speed Distributed Functional Testing to Detect Logic and Delay Faults in NoCs von Kakoee, Mohammad Reza, Bertacco, Valeria, Benini, Luca

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Hardware-friendly User-specific Machine Learning for Edge Devices von Goyal, Vidushi, Das, Reetuparna, Bertacco, Valeria

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SPIN as a Linearizability Checker under Weak Memory Models von Travkin, Oleg, Mütze, Annika, Wehrheim, Heike

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Cardio: CMP Adaptation for Reliability Through Dynamic Introspective Operation von Pellegrini, Andrea, Bertacco, Valeria

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Power-aware NoCs through routing and topology reconfiguration von Parikh, Ritesh, Das, Reetuparna, Bertacco, Valeria

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A Reliable Routing Architecture and Algorithm for NoCs von DeOrio, A., Fick, D., Bertacco, V., Sylvester, D., Blaauw, D., Jin Hu, Chen, G.

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Post-silicon platform for the functional diagnosis and debug of networks-on-chip von Abdel-Khalek, Rawan, Bertacco, Valeria

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ForEVeR: A complementary formal and runtime verification approach to correct NoC functionality von Parikh, Ritesh, Bertacco, Valeria

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PASS: String Solving with Parameterized Array and Interval Automaton von Li, Guodong, Ghosh, Indradeep

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A highly resilient routing algorithm for fault-tolerant NoCs von Fick, D., DeOrio, A., Chen, G., Bertacco, V., Sylvester, D., Blaauw, D.

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Post-Silicon Validation of Multiprocessor Memory Consistency von Mammo, Biruk W., Bertacco, Valeria, DeOrio, Andrew, Wagner, Ilya

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Vicis: a reliable network for unreliable silicon von Fick, David, DeOrio, Andrew, Hu, Jin, Bertacco, Valeria, Blaauw, David, Sylvester, Dennis

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ARIADNE: Agnostic Reconfiguration in a Disconnected Network Environment von Aisopos, K., DeOrio, A., Li-Shiuan Peh, Bertacco, V.

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Hardware and Software: 9th International Haifa Verification Conference, HVC 2013, Haifa, Israel, November 5-7, 2013, Proceedings von Bertacco, Valeria, Legay, Axel

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Gate-Level Simulation with GPU Computing von Chatterjee, Debapriya, Deorio, Andrew, Bertacco, Valeria

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