A Highly Parameterized and Efficient FPGA-Based Skeleton for Pairwise Biological Sequence Alignment von Benkrid, K., Ying Liu, Benkrid, A.

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Handling finite length signals borders in two-channel multirate filter banks for perfect reconstruction von Benkrid, A., Benkrid, K.

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A Protein Sequence Analysis Hardware Accelerator Based on Divergences von Jacobi, Ricardo Pezzuol, de Melo, Alba Cristina Magalhaes Alves, Moreano, Nahri, Eusse, Juan Fernando

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Efficient FPGA hardware development: A multi-language approach von Benkrid, K., Benkrid, A., Belkacemi, S.

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HIDE: A hardware intelligent description environment von Benkrid, K., Belkacemi, S., Benkrid, A.

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High Performance Biological Pairwise Sequence Alignment: FPGA versus GPU versus Cell BE versus GPP von Akoglu, Ali, Benkrid, Khaled, Ling, Cheng, Song, Yang, Liu, Ying, Tian, Xiang

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Towards a general framework for FPGA based image processing using hardware skeletons von Benkrid, K, Crookes, D, Benkrid, A

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An FPGA-Based Image Connected Component Labeller von Benkrid, K., Sukhsawas, S., Crookes, D., Benkrid, A.

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Real-Time Vocal Tract Modelling von Benkrid, A., Benallal, A., Benkrid, K.

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Runtime Scheduling, Allocation, and Execution of Real-Time Hardware Tasks onto Xilinx FPGAs Subject to Fault Occurrence von Iturbe, Xabier, Benkrid, Khaled, Hong, Chuan, Ebrahim, Ali, Arslan, Tughrul, Martinez, Imanol

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Novel Dynamic Partial Reconfiguration Implementation of K-Means Clustering on FPGAs: Comparative Results with GPPs and GPUs von Seker, Huseyin, Erdogan, Ahmet T., Ebrahim, Ali, Benkrid, Khaled, Hussain, Hanaa M.

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Design and Implementation of a Novel FIR Filter Architecture with Boundary Handling on Xilinx VIRTEX FPGAs von Benkrid, A., Benkrid, K., Crookes, D.

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High-Performance Reconfigurable Computing von Sano, Kentaro, Huang, Miaoqing, El-Araby, Esam, Benkrid, Khaled, Steinke, Thomas

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High level programming for real time FPGA based video processing von Benkrid, K., Crookes, D., Smith, J., Benkrid, A.

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High Performance Biosequence Database Scanning using FPGAs von Benkrid, K., Liu, Y., Benkrid, A.

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A Prolog-Based Hardware Development Environment von Benkrid, K., Crookes, D., Benkrid, A., Belkacemi, S.

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Design and implementation of novel FIR filter architecture for efficient signal boundary handling on Xilinx Virtex FPGAs von Benkrid, A., Benkrid, K., Crookes, D.

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Prediction of solids circulation patterns in a spouted bed von Sullivan, C., Benkrid, A., Caram, H.

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Minimisation and prediction of the error dynamic range in finite wordlength FIR based architectures: application to the 2-D orthogonal DWT von Benkrid, A., Benkrid, K., Crookes, D.

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Design and implementation of a novel architecture for symmetric FIR filters with boundary handling on Xilinx Virtex FPGAs von Benkrid, A., Benkrid, K., Crookes, D.

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