Three-dimensional place and route for FPGAs von Ababei, C., Mogal, H., Bazargan, K.

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Timing-driven partitioning-based placement for island style FPGAs von Maidee, P., Ababei, C., Bazargan, K.

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Single and Sequential Extraction of Cadmium in Some Highly Calcareous Soils of Southwestern Iran von Khanmirzaei, A, Bazargan, K, Amir Moezzi, A, Richards, B. K, Shahbazi, K

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An Architecture for Fault-Tolerant Computation with Stochastic Logic von Weikang Qian, Xin Li, Riedel, M D, Bazargan, K, Lilja, D J

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Fast and Accurate Statistical Criticality Computation Under Process Variations von Mogal, H.D., Qian, H., Sapatnekar, S.S., Bazargan, K.

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Statistical Analysis and Design of HARP FPGAs von Gang Wang, Sivaswamy, S., Ababei, C., Bazargan, K., Kastner, R., Bozorgzadeh, E.

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Reconfigurable readback-signal generator based on a field-programmable gate array von Jinghuan Chen, Jaekyun Moon, Bazargan, K.

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The synthesis of complex arithmetic computation on stochastic bit streams using sequential logic von Li, Peng, Lilja, David J., Qian, Weikang, Bazargan, Kia, Riedel, Marc

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Fast floorplanning for effective prediction and construction von Ranjan, A., Bazargan, K., Ogrenci, S., Sarrafzadeh, M.

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Integrating scheduling and physical design into a coherent compilation cycle for reconfigurable computing architectures von Bazargan, Kia, Ogrenci, Seda, Sarrafzadeh, Majid

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A reconfigurable FPGA-based readback signal generator for hard-drive read channel simulator von Jinghuan Chen, Jaekyun Moon, Bazargan, K.

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Improvements on Efficiency and Efficacy of SPFD-Based Rewiring for LUT-Based Circuits von Maidee, P, Bazargan, K

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Nostradamus: a floorplanner of uncertain designs von Bazargan, K., Samjung Kim, Sarrafzadeh, M.

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Fast template placement for reconfigurable computing systems von Bazargan, K., Kastner, R., Sarrafzadeh, M.

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Timing minimization by statistical timing hMetis-based partitioning von Ababei, C., Bazargan, K.

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Statistical timing driven partitioning for VLSI circuits von Ababei, C., Bazargan, K.

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Placement and routing in 3D integrated circuits von Ababei, C., Feng, Y., Goplen, B., Hushrav Mogal, Zhang, T., Bazargan, K., Sachin Sapatnekar

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An efficient implementation of numerical integration using logical computation on stochastic bit streams von Qian, Weikang, Wang, Chen, Li, Peng, Lilja, David J., Bazargan, Kia, Riedel, Marc D.

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Guest Editorial von Bazargan, K, DeHon, A

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Fast hierarchical floorplanning with congestion and timing control von Ranjan, A., Bazargan, K., Sarrafzadeh, M.

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