Convolutional Fully-Connected Capsule Network (CFC-CapsNet): A Novel and Fast Capsule Network von Shiri, Pouya, Baniasadi, Amirali

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Unveiling the Black Box: A Unified XAI Framework for Signal-Based Deep Learning Models von Shojaeinasab, Ardeshir, Jalayer, Masoud, Baniasadi, Amirali, Najjaran, Homayoun

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Quantum Annealing Methods and Experimental Evaluation to the Phase-Unwrapping Problem in Synthetic Aperture Radar Imaging von Kelany, Khaled A. Helal, Dimopoulos, Nikitas, Adolphs, Clemens P. J., Baniasadi, Amirali

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System-level reliability assessment of optical network on chip von Baharloo, Mohammad, Abdollahi, Meisam, Baniasadi, Amirali

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Dynamic warp resizing: Analysis and benefits in high-performance SIMT von Lashgar, A., Baniasadi, A., Khonsari, A.

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Multiobjective GPU design space exploration optimization von Jooya, Ali, Dimopoulos, Nikitas, Baniasadi, Amirali

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DL-CapsNet: A Deep and Light Capsule Network von Shiri, Pouya, Baniasadi, Amirali

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Hardware Design and Verification with Large Language Models: A Scoping Review, Challenges, and Open Issues von Abdollahi, Meisam, Yeganli, Seyedeh Faegheh, Baharloo, Mohammad (Amir), Baniasadi, Amirali

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Employing Software-Managed Caches in OpenACC: Opportunities and Benefits von Lashgar, Ahmad, Baniasadi, Amirali

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TELEPORT: Hardware/software alternative to CUDA shared memory programming von Lashgar, Ahmad, Atoofian, Ehsan, Baniasadi, Amirali

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Column selection solutions for L1 data caches implemented using eight-transistor cells von Farahani, Mostafa, Baniasadi, Amirali

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Column selection solutions for L 1 data caches implemented using eight‐transistor cells von Farahani, Mostafa, Baniasadi, Amirali

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Energy Efficient On-Demand Dynamic Branch Prediction Models von Mohammadi, Milad, Han, Song, Atoofian, Ehsan, Baniasadi, Amirali, Aamodt, Tor M., Dally, William J.

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Column selection solutions for L1 data caches implemented using eight-transistor cells von FARAHANI, Mostafa, BANIASADI, Amirali

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Power-efficient prefetching on GPGPUs von Falahati, Hajar, Hessabi, Shaahin, Abdi, Mania, Baniasadi, Amirali

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PDR-CapsNet: an Energy-Efficient Parallel Approach to Dynamic Routing in Capsule Networks von Javadinia, Samaneh, Baniasadi, Amirali

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CEDAR: Modeling impact of component error derating and read frequency on system-level vulnerability in high-performance processors von Asadi, Hossein, Haghdoost, Alireza, Ramezani, Morteza, Elyasi, Nima, Baniasadi, Amirali

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ARV–ALA: Improving performance of software transactional memory through adaptive read and write policies von Atoofian, Ehsan, Baniasadi, Amirali, Coady, Yvonne

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HARP: Harnessing inactive threads in many-core processors von Lashgar, Ahmad, Khonsari, Ahmad, Baniasadi, Amirali

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Using synchronization stalls in power-aware accelerators von Jooya, Ali, Baniasadi, Amirali

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