Bramble Flower Detection and Classification Dataset von Rijal, Madhav Rijal, Smith, Trevor Smith, Tatsch, Christopher Tatsch, Beard, Jared Beard, Chu, Andy Chu, Butts, R. Michael Butts, Waterland, Nicole Waterland, Gross, Jason Gross, Gu, Yu Gu

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Swarm of One: Bottom-up Emergence of Stable Robot Bodies from Identical Cells von Smith, Trevor, Butts, R. Michael, Adkins, Nathan, Gu, Yu

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Feeling Optimistic? Ambiguity Attitudes for Online Decision Making von Beard, Jared J, Butts, R. Michael, Gu, Yu

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Design of Stickbug: a Six-Armed Precision Pollination Robot von Smith, Trevor, Rijal, Madhav, Tatsch, Christopher, Butts, R. Michael, Beard, Jared, Cook, R. Tyler, Chu, Andy, Gross, Jason, Gu, Yu

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Feeling Optimistic? Ambiguity Attitudes for Online Decision Making von Beard, Jared J, Butts, R Michael, Gu, Yu

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A Framework for Controlling Multi-Robot Systems Using Bayesian Optimization and Linear Combination of Vectors von Jacobs, Stephen, Butts, R. Michael, Gu, Yu, Baheri, Ali, Pereira, Guilherme A. S

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Swarm of One: Bottom-up Emergence of Stable Robot Bodies from Identical Cells von Smith, Trevor, Butts, R Michael, Adkins, Nathan, Gu, Yu

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Design of Stickbug: a Six-Armed Precision Pollination Robot von Smith, Trevor, Rijal, Madhav, Tatsch, Christopher, Butts, R Michael, Beard, Jared, R Tyler Cook, Chu, Andy, Gross, Jason, Gu, Yu

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A Framework for Controlling Multi-Robot Systems Using Bayesian Optimization and Linear Combination of Vectors von Jacobs, Stephen, Butts, R Michael, Gu, Yu, Baheri, Ali, Pereira, Guilherme A S

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System for reconfiguring a processor array von Butts, Michael R

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System for reconfiguring a processor array von BUTTS MICHAEL R

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SYSTEM FOR RECONFIGURING A PROCESSOR ARRAY von BUTTS MICHAEL R

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Logic multiprocessor for FPGA implementation von BUTTS MICHAEL R

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Logic multiprocessor for FPGA implementation von Butts, Michael R

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System and method for performing design verification von Butts, Michael R, Mednick, Elliot H

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System and method for performing design verification von BUTTS MICHAEL R, MEDNICK ELLIOT H

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Logic multiprocessor for FPGA implementation von BUTTS MICHAEL R

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System of virtual data channels in an integrated circuit von BUTTS MICHAEL R, WASSON PAUL M, JONES ANTHONY MARK

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System of virtual data channels in an integrated circuit von Jones, Anthony Mark, Wasson, Paul M, Butts, Michael R

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Method for stimulating functional logic circuit with logical stimulus von BATCHELLER, JON A, BUTTS, MICHAEL R

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