Role of Interconnects in the Future of Computing von Borkar, Shekhar

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A 280mV-to-1.2V wide-operating-range IA-32 processor in 32nm CMOS von Jain, S., Khare, S., Yada, S., Ambili, V., Salihundam, P., Ramani, S., Muthukumar, S., Srinivasan, M., Kumar, A., Gb, S. K., Ramanarayanan, R., Erraguntla, V., Howard, J., Vangal, S., Dighe, S., Ruhl, G., Aseron, P., Wilson, H., Borkar, N., De, V., Borkar, S.

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Variation Tolerance in a Multichannel Carbon-Nanotube Transistor for High-Speed Digital Circuits von Raychowdhury, A., De, V.K., Kurtin, J., Borkar, S.Y., Roy, K., Keshavarzi, A.

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Designing reliable systems from unreliable components: the challenges of transistor variability and degradation von Borkar, S.

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A sub-130-nm conditional keeper technique von Alvandpour, A., Krishnamurthy, R.K., Soumyanath, K., Borkar, S.Y.

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Role of Interconnects in the Future of Computing : OPTICAL INTERCONNECTS von BORKAR, Shekhar

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A 5-GHz Mesh Interconnect for a Teraflops Processor von Hoskote, Y., Vangal, S., Singh, A., Borkar, N., Borkar, S.

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An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS von Vangal, S.R., Howard, J., Ruhl, G., Dighe, S., Wilson, H., Tschanz, J., Finan, D., Singh, A., Jacob, T., Jain, S., Erraguntla, V., Roberts, C., Hoskote, Y., Borkar, N., Borkar, S.

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A 48-Core IA-32 Processor in 45 nm CMOS Using On-Die Message-Passing and DVFS for Performance and Power Scaling von Howard, J, Dighe, S, Vangal, S R, Ruhl, G, Borkar, N, Jain, S, Erraguntla, V, Konow, M, Riepen, M, Gries, M, Droege, G, Lund-Larsen, T, Steibl, S, Borkar, S, De, V K, Van Der Wijngaart, R

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3D integration for energy efficient system design von Borkar, Shekhar

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Design challenges of technology scaling von Borkar, S.

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Design perspectives on 22nm CMOS and beyond von Borkar, Shekhar

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Review of On-Chip Inductor Structures With Magnetic Films von Gardner, D.S., Schrom, G., Paillet, F., Jamieson, B., Karnik, T., Borkar, S.

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Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors von Karnik, Tanay, Ye, Yibin, Tschanz, James, Wei, Liqiong, Burns, Steven, Govindarajulu, Venkatesh, De, Vivek, Borkar, Shekhar

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Within-Die Variation-Aware Dynamic-Voltage-Frequency-Scaling With Optimal Core Allocation and Thread Hopping for the 80-Core TeraFLOPS Processor von Dighe, S, Vangal, S R, Aseron, P, Kumar, S, Jacob, T, Bowman, K A, Howard, J, Tschanz, J, Erraguntla, V, Borkar, N, De, V K, Borkar, S

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Area-efficient linear regulator with ultra-fast load regulation von Hazucha, P., Karnik, T., Bloechel, B.A., Parsons, C., Finan, D., Borkar, S.

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Near-threshold voltage (NTV) design: opportunities and challenges von Kaul, Himanshu, Anders, Mark, Hsu, Steven, Agarwal, Amit, Krishnamurthy, Ram, Borkar, Shekhar

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Microarchitecture and Design Challenges for Gigascale Integration von Borkar, Shekhar

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Electronics beyond nano-scale CMOS von Borkar, Shekhar

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Near-threshold voltage (NTV) design - Opportunities and challenges von Kaul, H., Anders, M., Hsu, S., Agarwal, A., Krishnamurthy, R., Borkar, S.

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