Plasma Etching for Sub-45-nm TaN Metal Gates on High- k Dielectrics von Bliznetsov, V.N., Bera, L.K., Haw Yun Soo, Balasubramanian, N., Kumar, R., Guo-Qiang Lo, Won Jong Yoo, Chih Hung Tung, Linn, L.

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A method of fabricating metal-insulator-metal (MIM) capacitor in Cu/low- k backend interconnection process for RF application von Yu, M.B., Ning, Jiang, Balakumar, S., Bliznetsov, V.N., Lo, G.Q., Balasubramanian, N., Kwong, D.L.

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Comparative studies of physical and chemical properties of plasma-treated CVD low k SiOCH dielectrics von Tsang, C.F., Su, Y.J., Bliznetsov, V.N.

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Deep trench etch and clean process technology for CU/SiOC passive device von Yu, M.B., Bliznetsov, V.N., Chang, C.K., Ramana Murthy, B.

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Study and improvement of electrical performance of 130 nm Cu/CVD low k SiOCH interconnect related to via etch process von Tsang, C.F., Bliznetsov, V.N., Su, Y.J.

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130 nm process technology integration of advanced Cu/CVD low k dielectric material-case study of failure analysis and yield enhancement von Tsang, C.F., Su, Y.J., Bliznetsov, V.N., Ang, G.T.

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PROCESS OF PLASMA-CHEMICAL ETCHING OF POLYSILICON TO SILICON von GUSHCHIN O.P, BLIZNETSOV V.N, KISLJAKOV A.V, LUKASEVICH M.I, JACHMENEV V.A, SHEVCHENKO A.P, GORNEV E.S

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