Development of a digital waveform synthesis integrated circuit von Heikes, Craig A, Barnes, James O, Beucler, Dale R

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Method and apparatus for enabling a user to determine whether a defective location in a memory device has been remapped to a redundant memory portion von Rearick, Jeffrey R, Koss, Louise A, Nash, Mary Louise, Beucler, Dale R

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Method and apparatus for enabling a user to determine whether a defective location in a memory device has been remapped to a redundant memory portion von BEUCLER DALE R, NASH MARY LOUISE, REARICK JEFFREY R, KOSS LOUISE A

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Method and apparatus for enabling a user to determine whether a defective location in a memory device has been remapped to a redundant memory portion von BEUCLER DALE R, NASH MARY L, REARICK JEFFREY R, KOSS LOUISE A

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Integrated circuit with alternately selectable state evaluation provisions von Juenemann, Christopher M, Goertzen, Bradley J, Fisher, Rory L, Fiscus, Randy L, Miller, Brian C, Meier, Peter J, Buck-Gengler, Joel, Bower, Kenneth S, Diehl, Michael R, Beucler, Dale R

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Integrated circuit with alternately selectable state evaluation provisions von BEUCLER DALE R, MEIER PETER J, DIEHL MICHAEL R, GOERTZEN BRADLEY J, BOWER KENNETH S, FISCUS RANDY L, MILLER BRIAN C, BUCK-GENGLER JOEL, JUENEMANN CHRISTOPHER M, FISHER RORY L

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INTEGRATED CIRCUIT von BEUCLER DALE R, MEIER PETER J, DIEHL MICHAEL R, GOERTZEN BRADLEY J, BUCK-GENGLER JOEL DANIEL, BOWER KENNETH S, FISCUS RANDY L, MILLER BRIAN C, JUENEMANN CHRISTOPHER M, FISHER RORY L

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Self-testing integrated circuit has switch which selectively provides either output signal of test access port or output signal of command decoder to shift register von JUENEMANN, CHRISTOPHER M, MEIER, PETER J, BEUCLER, DALE R, FISHER, RORY L, BOWER, KENNETH S, FISCUS, RANDY L, DIEHL, MICHAEL R, GOERTZEN, BRADLEY J, MILLER, BRIAN C, BUCK-GENGLER, JOEL

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