Treffer 1 - 20 von 63 für Suche 'Azimi, Mani', Suchdauer: 0,76s Treffer weiter einschränken
  1. 1
    Application-to-core mapping policies to reduce memory system interference in multi-core systems

    Application-to-core mapping policies to reduce memory system interference in multi-core systems von Das, R., Ausavarungnirun, R., Mutlu, O., Kumar, A., Azimi, M.


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  2. 2
    MoDe-X: Microarchitecture of a Layout-Aware Modular Decoupled Crossbar for On-Chip Interconnects

    MoDe-X: Microarchitecture of a Layout-Aware Modular Decoupled Crossbar for On-Chip Interconnects von Dongkook Park, Vaidya, Aniruddha, Kumar, Akhilesh, Azimi, Mani

    Veröffentlicht in IEEE transactions on computers

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  3. 3
    GREEN Cache: Exploiting the Disciplined Memory Model of OpenCL on GPUs

    GREEN Cache: Exploiting the Disciplined Memory Model of OpenCL on GPUs von Jaekyu Lee, Dong Hyuk Woo, Hyesoon Kim, Azimi, Mani

    Veröffentlicht in IEEE transactions on computers

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  4. 4
    TECHNIQUES FOR ENABLING BIT-PARALLEL WIDE STRING MATCHING WITH A SIMD REGISTER

    TECHNIQUES FOR ENABLING BIT-PARALLEL WIDE STRING MATCHING WITH A SIMD REGISTER von THANTRY, Hariharan, AZIMI, Mani

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  5. 5
    Instruction set for supporting wide scalar pattern matches

    Instruction set for supporting wide scalar pattern matches von Thantry, Hariharan L, Azimi, Mani

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  6. 6
    Techniques for enabling bit-parallel wide string matching with a SIMD register

    Techniques for enabling bit-parallel wide string matching with a SIMD register von Thantry Hariharan, Azimi Mani

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  7. 7
    Scalable coherence for multi-core processors

    Scalable coherence for multi-core processors von Cherukuri Naveen, Azimi Mani

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  8. 8
    TECHNIQUES FOR ENABLING BIT-PARALLEL WIDE STRING MATCHING WITH A SIMD REGISTER

    TECHNIQUES FOR ENABLING BIT-PARALLEL WIDE STRING MATCHING WITH A SIMD REGISTER von THANTRY, HARIHARAN, AZIMI, MANI

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  9. 9
    INSTRUCTION SET FOR SUPPORTING WIDE SCALAR PATTERN MATCHES

    INSTRUCTION SET FOR SUPPORTING WIDE SCALAR PATTERN MATCHES von Thantry Hariharan L, Azimi Mani

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  10. 10
    Techniques for enabling bit-parallel wide string matching with a SIMD register

    Techniques for enabling bit-parallel wide string matching with a SIMD register von AZIMI MANI, THANTRY HARIHARAN

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  11. 11
    Integration Challenges and Tradeoffs for Terascale Architectures

    Integration Challenges and Tradeoffs for Terascale Architectures von Azimi, Mani

    Veröffentlicht in Intel technology journal

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  12. 12
    An analytical study of Doppler ultrasound systems

    An analytical study of Doppler ultrasound systems von Azimi, Mani, Kak, A.C.

    Veröffentlicht in Ultrasonic imaging

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  13. 13
    Instruction set for supporting wide scalar pattern matches

    Instruction set for supporting wide scalar pattern matches von Thantry Hariharan L, Azimi Mani

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  14. 14
    TECHNIQUES FOR ENABLING BIT-PARALLEL WIDE STRING MATCHING WITH A SIMD REGISTER

    TECHNIQUES FOR ENABLING BIT-PARALLEL WIDE STRING MATCHING WITH A SIMD REGISTER von THANTRY, HARIHARAN, AZIMI, MANI

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  15. 15
    TECHNIQUES FOR ENABLING BIT-PARALLEL WIDE STRING MATCHING WITH A SIMD REGISTER

    TECHNIQUES FOR ENABLING BIT-PARALLEL WIDE STRING MATCHING WITH A SIMD REGISTER von AZIMI MANI, THANTRY HARIHARAN

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  16. 16
    Apparatus and method for improving data prefetching efficiency using history based prefetching

    Apparatus and method for improving data prefetching efficiency using history based prefetching von CHERUKURI NAVEEN, AZIMI MANI

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  17. 17
    INSTRUCTION SET FOR SUPPORTING WIDE SCALAR PATTERN MATCHES

    INSTRUCTION SET FOR SUPPORTING WIDE SCALAR PATTERN MATCHES von AZIMI MANI, THANTRY HARIHARAN L

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  18. 18
    REGION BASED TECHNIQUE FOR ACCURATELY PREDICTING MEMORY ACCESSES

    REGION BASED TECHNIQUE FOR ACCURATELY PREDICTING MEMORY ACCESSES von KUMAR, Akhilesh, SOARES, Livio, CHERUKURI, Naveen, AZIMI, Mani

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  19. 19
    SCALABLE COHERENCE FOR MULTI-CORE PROCESSORS

    SCALABLE COHERENCE FOR MULTI-CORE PROCESSORS von AZIMI, MANI, CHERUKURI, NAVEEN

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  20. 20
    SCALABLE COHERENCE FOR MULTI-CORE PROCESSORS

    SCALABLE COHERENCE FOR MULTI-CORE PROCESSORS von CHERUKURI NAVEEN, AZIMI MANI

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