Strain engineered extremely thin SOI (ETSOI) for high-performance CMOS von Khakifirooz, A., Cheng, K., Nagumo, T., Loubet, N., Adam, T., Reznicek, A., Kuss, J., Shahrjerdi, D., Sreenivasan, R., Ponoth, S., He, H., Kulkarni, P., Liu, Q., Hashemi, P., Khare, P., Luning, S., Mehta, S., Gimbert, J., Zhu, Y., Zhu, Z., Li, J., Madan, A., Levin, T., Monsieur, F., Yamamoto, T., Naczas, S., Schmitz, S., Holmes, S., Aulnette, C., Daval, N., Schwarzenbach, W., Nguyen, B.-Y, Paruchuri, V., Khare, M., Shahidi, G., Doris, B.

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Dual strained channel CMOS in FDSOI architecture: New insights on the device performance von Le Royer, C., Cassé, M., Cooper, D., Andrieu, F., Weber, O., Brevard, L., Perreau, P., Damlencourt, J.-F., Baudot, S., Prévitali, B., Tabone, C., Allain, F., Scheiblin, P., Rauer, C., Figuet, C., Aulnette, C., Daval, N., Nguyen, B.-Y., Bourdelle, K.K., Gyani, J., Valenza, M.

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High-resistivity with PN interface passivation in 22 nm FD-SOI technology for low-loss passives at RF and millimeter-wave frequencies von Nyssens, L., Rack, M., Nabet, M., Schwan, C., Zhao, Z., Lehmann, S., Herrmann, T., Henke, D., Kondrat, A., Soonekindt, C., Koch, F., Kache, T., Kini, D.P., Zimmerhackl, O., Allibert, F., Aulnette, C., Lederer, D., Raskin, J.-P.

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Ultra-thin strained SOI substrate analysis by pseudo-MOS measurements von Gallon, C., Fenouillet-Beranger, C., Bresson, N., Cristoloveanu, S., Allibert, F., Bord, S., Aulnette, C., Delille, D., Latu-Romain, E., Hartmann, J.M., Ernst, T., Andrieu, F., Campidelli, Y., Ghyselen, B., Cayrefourcq, I., Fournel, F., Kernevez, N., Skotnicki, T.

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Dual channel and strain for CMOS co-integration in FDSOI device architecture von Le Royer, C, Casse, M, Andrieu, F, Weber, O, Brevard, L, Perreau, P, Damlencourt, J, Baudot, S, Tabone, C, Allain, F, Scheiblin, P, Rauer, C, Hutin, L, Figuet, C, Aulnette, C, Daval, N, Nguyen, B, Bourdelle, K K

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Ultra Thin silicon substrate for next generation technology nodes von Schwarzenbach, W, Cauchy, X, Bonnin, O, Boedt, F, Butaud, E, Moulin, C, Kerdiles, S, Gilbert, J.-F, Daval, N, Aulnette, C, Girard, C, Yoshimi, M, Maleville, C

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New layer transfers obtained by the SmartCut process von MORICEAU, H, FOURNEL, F, SOUBIE, A, BIASSE, B, SOUSBIE, N, SARTORI, S, MICHAUD, J. F, LETERTRE, F, RAYSSAC, O, CAYREFOURCQ, I, RICHTARCH, C, DAVAL, N, ASPAR, B, AULNETTE, C, AKATSU, T, OSTERNAUD, B, GHYSELEN, B, MAZURE, C, BATAILLOU, B, BEAUMONT, A, MORALES, C, CARTIER, A. M, POCAS, S, LAGAHE, C, JALAGUIER, E

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Modeling and direct extraction of band offset induced by stress engineering in silicon-on-insulator metal-oxide-semiconductor field effect transistors: Implications for device reli... von Garros, X., Rochette, F., Andrieu, F., Baudot, S., Reimbold, G., Aulnette, C., Daval, N., Boulanger, F.

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Strain characterization of strained silicon on insulator wafers von Paillard, V, Ghyselen, B, Aulnette, C, Osternaud, B, Daval, N, Fournel, F, Moriceau, H, Ernst, T, Hartmann, J.M, Lagahe-Blanchard, C, Pocas, S, Leduc, P, Vincent, L, Cristiano, F, Campidelli, Y, Kermarrec, O, Besson, P, Morand, Y

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Ultra-Thin Film SOI/BOX Substrate Development, Its Application and Readiness von Schwarzenbach, Walter, Cauchy, Xavier, Bonnin, Olivier, Daval, Nicolas, Aulnette, Cécile, Girard, Christophe, Nguyen, Bich-Yen, Maleville, Christophe

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Splitting kinetics of Si0.8Ge0.2 layers implanted with H or sequentially with He and H von Nguyen, Phuong, Bourdelle, K. K., Aulnette, C., Lallement, F., Daix, N., Daval, N., Cayrefourcq, I., Letertre, F., Mazuré, C., Bogumilowicz, Y., Tauzin, A., Deguet, C., Cherkashin, N., Claverie, A.

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SiGe and Ge on Insulator Wafers von Daval, Nicolas, Figuet, Christophe, Aulnette, Cécile, Landru, Didier, Drazek, Charlotte, Bourdelle, Konstantin K., Guiot, Eric, Letertre, Fabrice, Nguyen, Bich-Yen, Mazure, Carlos

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Splitting kinetics of Si$_{0.8}$Ge$_{0.2}$ layers implanted with H or sequentially with He and H von Nguyen, P., Bourdelle, K.K., Aulnette, C., Lallement, F., Daix, N., Daval, N., Cayrefourcq, I., Letertre, F., Mazuré, C., Bogumilowicz, Y., Tauzin, A., Deguet, C., Cherkashin, Nikolay, Claverie, Alain

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Splitting kinetics of Si 0.8 Ge 0.2 layers implanted with H or sequentially with He and H von Nguyen, Phuong, Bourdelle, K. K., Aulnette, C., Lallement, F., Daix, N., Daval, N., Cayrefourcq, I., Letertre, F., Mazuré, C., Bogumilowicz, Y., Tauzin, A., Deguet, C., Cherkashin, N., Claverie, A.

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Ultra-thin SOI for 20nm node and beyond von Aulnette, C., Schwarzenbach, W., Daval, N., Bonnin, O., Nguyen, B-Y, Mazure, C., Maleville, C., Cheng, K., Ponoth, S., Khakifirooz, A., Hook, T., Doris, B.

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Highly-Strained Silicon-On-Insulator Development von Akatsu, Takeshi, Hartmann, Jean-Michel, Aulnette, Cécile, Le Vaillant, Yves-Matthieu, Rouchon, Denis, Abbadie, Alexandra, Bogumilowicz, Yann, Portigliatti, Lionel, Colnat, Cyrille, Boudou, Nicolas, Lallement, Fabrice, Triolet, Fanny, Figuet, Christophe, Martinez, Muriel, Nguyen, Phuong, Delattre, Cécile, Tsyganenko, Kira, Berne, Cécile, Allibert, Frédéric, Deguet, Chrystel

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Ultra-thin strained SOI substrate analysis by pseudo-MOS measurements von Gallon, C., Fenouillet-Beranger, C., Bresson, N., Cristoloveanu, Sorin, Allibert, Michel, Bord, S., Aulnette, C., Delille, Dominique, Latu-Romain, Eddy, Hartmann, Jean-Michel, Ernst, T., Andrieu, F., Campidelli, Y., Ghyselen, B., Cayrefourcq, I., Fournel, F., Kernevez, N., Skotnicki, T.

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Engineering strained silicon on insulator wafers with the Smart CutTM technology von Ghyselen, B., Hartmann, J.-M., Ernst, T., Aulnette, C., Osternaud, B., Bogumilowicz, Y., Abbadie, A., Besson, P., Rayssac, O., Tiberj, A., Daval, N., Cayrefourq, I., Fournel, F., Moriceau, H., Di Nardo, C., Andrieu, F., Paillard, V., Cabié, M., Vincent, L., Snoeck, E., Cristiano, F., Rocher, A., Ponchet, A., Claverie, A., Boucaud, P., Semeria, M.-N., Bensahel, D., Kernevez, N., Mazure, C.

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Engineering strained silicon on insulator wafers with the Smart Cut TM technology von Ghyselen, B., Hartmann, J.-M., Ernst, T., Aulnette, C., Osternaud, B., Bogumilowicz, Y., Abbadie, A., Besson, P., Rayssac, O., Tiberj, A., Daval, N., Cayrefourq, I., Fournel, F., Moriceau, H., Di Nardo, C., Andrieu, F., Paillard, V., Cabié, M., Vincent, L., Snoeck, E., Cristiano, F., Rocher, A., Ponchet, A., Claverie, A., Boucaud, P., Semeria, M.-N., Bensahel, D., Kernevez, N., Mazure, C.

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Overview of FDSOI technology from substrate to device von Nguyen, B.-Y., Mazure, C., Delprat, D., Aulnette, C., Daval, N., Andrieu, F., Faynot, O.

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